AD7367

Preliminary Technical Data

Rev. PrD | Page 12 of 16

easily interface to both 3 V and 5 V processors. For example, if

be powered from a 3 V supply, allowing a large dynamic range

with low voltage digital processors. Thus, the AD7367 could be

used with the ±10 V input range while still being able to

interface to 3 V digital parts.

be greater than or equal to 4.75V, see table 3. The maximum

less than 4.75 and greater than 2.7 is 900 Ksps.

REFERENCE

The AD7367 can operate with either the internal 2.5 V on-chip

reference or an externally applied reference. The logic state of

the REFSEL pin determines whether the internal reference is

used. The internal reference is selected for both ADC when the

REFSEL pin is tied to logic high. If the REFSEL pin is tied to

GND then an external reference can be supplied through the

tied to either a low or high logic state for the part to operate.

The internal reference circuitry consists of a 2.5 V band gap

reference and a reference buffer. When operating the AD7367

in internal reference mode, the 2.5 V internal reference is

to AGND using a 680nF capacitor. It is recommended that the

internal reference be buffered before applying it elsewhere in

the system. The internal reference is capable of sourcing up to

150 μA with an analog input range of ±10 and 60 μA for both

the ±5V and 0-10V ranges.

If the internal reference operation is required for the ADC

conversion, the REFSEL pin must be tied to logic high on

power-up. The reference buffer requires 500 µs to power up and

charge the 680nF decoupling capacitor during the power-up

time.

The AD7367 is specified for a 2.5 V to 3 V reference range.

When a 3V reference is selected, the ranges are ±12 V, ±6 V, and

equal to or greater than the +12V &-12V respectively.