AD15452

Rev. 0 | Page 8 of 16

TERMINOLOGY

Analog Bandwidth

Analog bandwidth is the analog input frequency at which the

spectral power of the fundamental frequency (as determined by

the FFT analysis) is reduced by 3 dB from full scale.

Aperture Delay

Aperture delay is a measure of the sample-and-hold amplifier

(SHA) performance and is measured from the 50% point rising

edge of the clock input to the time at which the input signal is

held for conversion.

Aperture Uncertainty (Jitter)

Aperture jitter is the variation in aperture delay for successive

samples and can be manifested as frequency dependent noise

on the ADC input.

Clock Pulse Width and Duty Cycle

Pulse width high is the minimum amount of time that the clock

pulse should be left in the Logic 1 state to achieve a rated

performance. Pulse width low is the minimum time the clock

pulse should be left in the low state. At a given clock rate, these

specifications define an acceptable clock duty cycle.

Common-Mode Rejection Ratio (CMRR)

CMRR is defined as the amount of rejection on the differential

analog inputs over the entire full-scale signal range.

Crosstalk

Crosstalk is defined as the coupling onto any other channel

when one channel is driven by a full-scale signal.

Gain Flatness

Gain flatness is the measured amount of fluctuation in the

analog front-end input response to the bandwidth measured.

Differential Analog Input Capacitance

The complex impedance simulated at each analog input port.

Differential Analog Input Voltage Range

The peak-to-peak differential voltage that must be applied to

the converter to generate a full-scale response. Peak differential

voltage is computed by observing the voltage on a pin and

subtracting the voltage from a second pin that is 180° out of

phase. Peak-to-peak differential is computed by rotating the

input phase 180° and taking the peak measurement again. The

difference is computed between both peak measurements.

Differential Nonlinearity (DNL, No Missing Codes)

An ideal ADC exhibits code transitions that are exactly 1 LSB

apart. DNL is the deviation from this ideal value. Guaranteed

codes, respectively, must be present over all operating ranges.

Effective Number of Bits (ENOB)

For a sine wave, SINAD can be expressed in terms of the

number of bits. Using the following formula, it is possible to

obtain a measure of performance expressed as N, the effective

number of bits:

N = (SINAD – 1.76)/6.02

Thus, the effective number of bits for a device for sine wave

inputs at a given input frequency can be calculated directly

from its measured SINAD.

Gain Error

The largest gain error is specified and is considered the

difference between the measured and ideal full-scale input

voltage range.

Gain Matching

Expressed in %FSR. Computed using the following equation:

%

100

2

min

max

min

max

×

⎟

⎠

⎞

⎜

⎝

⎛

+

−

=

FSR

FSR

FSR

FSR

Matching

Gain

where:

Second and Third Harmonic Distortion

The ratio of the rms signal amplitude to the rms value of the

second or third harmonic component, reported in dBc.

Integral Nonlinearity (INL)

INL refers to the deviation of each individual code from a line

drawn from negative full scale through positive full scale. The

point used as negative full scale occurs 1/2 LSB before the first

code transition. Positive full scale is defined as a level 1 1/2 LSB

beyond the last code transition. The deviation is measured from

the middle of each particular code to the true straight line.

Noise Power Ratio (NPR)

NPR is the rms noise power injected into the ADC vs. the

rejected band of interest (notch depth measured).

Offset Error

The largest offset error is specified and is considered the

difference between the measured and ideal voltage at the analog

input that produces the midscale code at the outputs.