CS5303 datasheet(15/19 Pages) ONSEMI

15 / 19 page

CS5303

http://onsemi.com

DVR + ConverterZ

ESR

ConverterZ +

PwrstgZ

ESR

PwrstgZ ) ESR

where:

PwrstgZ + RS

CSA Gain 3

Multiply the converterZ by the output current step

size to calculate where the output voltage should

recover to within the first switching cycle after a

transient. If the ConverterZ is higher than the value

required to recover to where the adaptive positioning

is set the remainder of the recovery will be controlled

by the error amp compensation and will typically

recover in 10 − 20 μs.

DVR + DIOUT

ConverterZ

Make sure that ΔVR is less than the expected peak

transient for a good transient response.

5. Adjust L and RL or RS as required to meet the best

combination of transient response, steady state output

voltage ripple and pulse width jitter.

Current Limit

When the sum of the Current Sense amplifiers (VITOTAL)

exceeds the voltage on the ILIM pin the part will enter hiccup

mode. For inductive sensing the ILIM pin voltage should be

set based on the inductor resistance (or current sense

resistor) at max temperature and max current. To set the level

of the ILIM pin:

6. VI(LIM) + R IOUT(LIM) CS to ILIM Gain

where:

R is RL or RS;

IOUT(LIM) is the current limit threshold.

For the overcurrent to work properly the inductor

time constant (L/R) should be ≤ the Current sense RC.

If the RC is too fast, during step loads the current

waveform will appear larger than it is (typically for a

few hundred μs) and may trip the current limit at a

level lower than the DC limit.

Adaptive Positioning

7. To set the amount of voltage positioning below the

DAC setting at no load connect a resistor (RV(FB))

between the output voltage and the VFB pin. Choose

RV(FB) as:

RV(FB) + NL Position VFB Bias Current

See Figure 4 for VFB Bias Current.

8. To set the difference in output voltage between no

load and full load, connect a resistor (RV(DRP))

between the VDRP and VFB pins. RV(DRP) can be

calculated in two steps. First calculate the difference

between the VDRP and VFB pin at full load. (The VFB

voltage should be the same as the DAC voltage during

closed loop operation.) Then choose the RV(DRP) to

source enough current across RV(FB) for the desired

change in output voltage.

DVV(DRP) + IOUTFL

CS to VDRP Gain

where:

R = RL or RS for one phase;

IOUTFL is the full load output current.

RV(DRP) + DVDRP

RV(FB) DVOUT

DESIGN EXAMPLE

Choose the component values for lossless current sensing,

adaptive positioning and current limit for a 60 A converter.

The adaptive positioning is chosen 50 mV below the

maximum VOUT at no load and 50 mV below the no−load

position with 60 A out. The peak output voltage transient is

100 mV max during a 60 A step current. The overcurrent

limit is nominally 75 A.

Current Sensing, Power Stage and

Output Filter Components

1. Assume 1.5 mΩ of output filter ESR.

+ (VIN * VOUT)

(VOUT VIN) (F

25 mV)

+ (12 * 1.5)

(1.5 12) (250 k

.01 mF

25 mV)

+ 21 kW å Choose 20 kW

L RL + .01 mF

20 kW + 200 ms

Choose RL + 2mW

L + 2mW

200 ms + 400 nH

3. n/a

PwrstgZ + RL

CSA Gain 3

+ 1.5 mW

4.2 3 + 2.1 mW

ConverterZ +

PwrstgZ

ESR

PwrstgZ ) ESR

+ 2.8 mW

1.5 mW

2.8 mW ) 1.5 mW

^ 1mW

DVR + 1.2 mW

60 A + 60 mV

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