CS5165A

http://onsemi.com

2

Figure 1. Application Diagram, 5.0 V to 2.8 V @ 14.2 A for 300 MHz Pentium II

COMP

GATE(H)

PGND

SS

CS5165A

PCB trace

6.0 m

W

12 V

330 pF

0.1

mF

LGND

1200

mF/10 V × 3

1.0

mF

Pentium II

System

1200

mF/10 V × 5

1.2

mH

5.0 V

3.3 k

1000 pF

IRL3103

GATE(L)

0.1

mF

PWRGD

ENABLE

IRL3103

ENABLE

PWRGD

MAXIMUM RATINGS

Rating

Value

Unit

0 to 150

°C

Lead Temperature Soldering:

Reflow: (SMD styles only) (Note 1)

230 peak

°C

−65 to +150

°C

ESD Susceptibility (Human Body Model)

2.0

kV

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

1. 60 second maximum above 183

°C.

MAXIMUM RATINGS

Pin Name

Pin Symbol

IC Power Input

16 V

−0.3 V

N/A

1.5 A peak, 200 mA DC

Soft−Start Capacitor

SS

6.0 V

−0.3 V

200

mA

10

mA

Compensation Capacitor

COMP

6.0 V

−0.3 V

10 mA

1.0 mA

Voltage Feedback Input

6.0 V

−0.3 V

10

mA

10

mA

Off−Time Capacitor

6.0 V

−0.3 V

1.0 mA

50 mA

Voltage ID DAC Inputs

6.0 V

−0.3 V

1.0 mA

10

mA

High−Side FET Driver

GATE(H)

16 V

−0.3 V

1.5 A peak, 200 mA DC

1.5 A peak, 200 mA DC

Low−Side FET Driver

GATE(L)

16 V

−0.3 V

1.5 A peak, 200 mA DC

1.5 A peak, 200 mA DC

Enable Input

ENABLE

6.0 V

−0.3 V

100

mA

1.0 mA

Power Good Output

PWRGD

6.0 V

−0.3 V

10

mA

30 mA

Power Ground

PGND

0 V

0 V

1.5 A peak, 200 mA DC

N/A

Logic Ground

LGND

0 V

0 V

100 mA

N/A