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DEVICE DESCRIPTION

The GF9103 is composed of five main sections:

1. 4:2:2 De-Multiplexer

2. FIR Filtering and Setup Insertion

3. Color Space Conversion

4. Digital SIN X/X Correction

5. Output Processing

4:2:2 DE-MULTIPLEXER

The de-multiplexer accepts data multiplexed in a SMPTE

The input data stream is assumed to be a multiplexed

refer to cosited samples and where [Y] refers to an isolated

Luminance sample. When operating the GF9103 with 8 bit

At least once during a power cycle, the GF9103 must be

synchronized to the incoming data stream. The GF9103 is

synchronized by holding SYNC high on clock period N and

re-synchronization is desired, or it may be toggled at every

Figure 9 for required operation of the SYNC control signal.

The internal de-multiplexer will de-multiplex all data in the

input data stream including any ancillary, EDH,VITC, and

EAV/SAV ... signals that may be present. Since this data is

passed directly to the interpolation filters in the same way

that active video would be, it is recommended that such

data be replaced with appropriate blanking levels prior to

entering the GF9103.

The output of the 4:2:2 de-multiplexer consists of three 10

to their respective interpolation filter.

INTERPOLATION FILTERS

Within the interpolation stage, the Luminance data is over-

sampled by a factor of four so that the 4:2:2 data is

converted to 8:8:8 data. By over-sampling the 4:2:2 data to

8:8:8 data, the size, cost and complexity of the analog

reconstruction filters following Digital to Analog converters

are reduced.

The Luminance data is over-sampled by a linear phase FIR

filter providing 0.0 dB DC gain, +0.038/-0.025 pass- band

ripple [0.0 ƒs to 0.21 ƒs], 6 dB attenuation at ƒs/4, and 47

dB stopband attenuation [0.30 ƒs to 0.50 ƒs]. Figure 3 and

Figure 4 present the frequency response of the Luminance

interpolation filter.

The C

filter providing 0.0 dB DC gain, passband ripple of +0.2 dB/-

0.2 dB [0.0 to 0.07 ƒs], 6 dB attenuation at ƒs/8 and a

stopband attenuation of 28 dB [ 0.17ƒs to 0.50 ƒs].

Figure 5 and Figure 6 present the frequency response of the

Following the interpolation process, a DC offset may be

introduced into the Luminance channel. Setup insertion is

enabled and disabled by the SETUP control signal. While

SETUP is high, the Luminance data is scaled by a factor of

+947/1024 and an offset of +71 (decimal) is added. While

SETUP is low, no scaling or offset is applied and the data

passes through the stage unmodified. The timing diagram

in Figure 10 demonstrates the operation of the SETUP

control signal.

COLOR SPACE CONVERSION

Two operating modes exist for the color space converter

section.

These

two

modes

are

controlled

by

the

SELECT_MATRIX control signal. While SELECT_MATRIX is

low, the de-matrixing 3 x 3 multiplier is bypassed so that

unmodified.

While SELECT_MATRIX is high, the 3 x 3

multiplier implements the following color space conversion:

SIN X/X CORRECTION

While BYPASS is high, SIN X/X correction is enabled on

each of the three output channels. SIN X/X correction is

implemented by passing the data through a FIR filter with

the frequency response shown in Figure 7. While BYPASS is

low, the FIR filter is bypassed and each channel is passed

directly to the output processing section. Total latency

through the device is 22 clock cycles when BYPASS is low

and 24 clock cycles when BYPASS is high.

OUTPUT PROCESSING

Output data may be rounded to 10 or 8 bit accuracy.

RND10/8 should be set high for 10 bit output rounding and

set low for 8 bit output rounding. Rounding to 8 bit accuracy

complement) or unsigned (offset binary) data depending on

the state of the CONVERT control signal. When CONVERT

obtained by inverting the sign bit of the two's complement

number.

When

operating

in

RGB

output

mode,

the

CONVERT pin is over-ridden and RGB data

is always

output as unsigned (offset binary) data.

G

B

R

1

-689/2048

-1430/2048

1

3548/2048

0

1

0

2807/2048

Y

C

B

C

R

=