521 - 33 - 04

3

Fig. 1 GF9103 Pin Connections

Fig. 2a Equivalent Input Circuit

Fig. 2b Equivalent Output Circuit

GND

SOA9

SOA8

SOA7

SOA6

SOA5

SOA4

SOA3

VDD

SOA2

SOA1

SOA0

SOB9

SOB8

SOB7

SOB6

VDD

VDD

SI8

SI7

SI6

SI5

SI4

SI3

SI2

VDD

SI1

SI0

SOC0

SOC1

SOC2

SOC3

SOC4

GND

GF9103

TOP VIEW

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

9

8

7

6

5

4

3

2

1

68 67 66 65 64 63 62 61

n SUBSTRATE

CONTROL

INPUT

p WELL

GND

n

p

VDD

D1

D2

n+

p+

D1

D2

GND

n SUBSTRATE

p WELL

n

p

n+

p+

VDD