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ICS951413 датащи(PDF) 12 Page - Renesas Technology Corp

номер детали ICS951413
подробное описание детали  Programmable System Clock Chip for ATI RS400 P4TM-based Systems
PDF  25 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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ICS951413 датащи(HTML) 12 Page - Renesas Technology Corp

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12
Integrated
Circuit
Systems, Inc.
ICS951413
0929D—10/30/06
SMBus Table: M/N Programming & WD Safe Frequency Control Register
Pin #
Name
Control Function
Type
01
PWD
Bit 7
M/N_EN
PLLS M/N
Programming Enable
RW
Disable
Enable
0
Bit 6
Reserved
Reserved
RW
-
-
0
Bit 5
WD Safe Freq
Source
WD Safe Freq Source
RW
B10b(4:0)
Latch
Inputs
0
Bit 4
WD SF4
RW
0
Bit 3
WD SF3
RW
0
Bit 2
WD SF2
RW
0
Bit 1
WD SF1
RW
0
Bit 0
WD SF0
RW
0
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
01
PWD
Bit 7
N Div8
N Divider Prog bit 8
RW
X
Bit 6
N Div9
N Divider Prog bit 9
RW
X
Bit 5
M Div5
RW
X
Bit 4
M Div4
RW
X
Bit 3
M Div3
RW
X
Bit 2
M Div2
RW
X
Bit 1
M Div1
RW
X
Bit 0
M Div0
RW
X
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
01
PWD
Bit 7
N Div7
RW
X
Bit 6
N Div6
RW
X
Bit 5
N Div5
RW
X
Bit 4
N Div4
RW
X
Bit 3
N Div3
RW
X
Bit 2
N Div2
RW
X
Bit 1
N Div1
RW
X
Bit 0
N Div0
RW
X
SMBus Table: CPU Spread Spectrum Control Register
Pin #
Name
Control Function
Type
01
PWD
Bit 7
SSP7
RW
X
Bit 6
SSP6
RW
X
Bit 5
SSP5
RW
X
Bit 4
SSP4
RW
X
Bit 3
SSP3
RW
X
Bit 2
SSP2
RW
X
Bit 1
SSP1
RW
X
Bit 0
SSP0
RW
X
-
-
Byte 13
-
Spread Spectrum
Programming bit(7:0)
-
-
-
-
-
-
-
Byte 12
-
N Divider Programming
Byte12 bit(7:0) and
Byte11 bit(7:6)
-
-
-
-
-
-
Byte 11
-
The decimal
representation of M and
N Divier in Byte 11 and
12 will configure the
CPU VCO frequency.
Default at power up =
latch-in or Byte 0 Rom
table. VCO Frequency =
14.318 x [NDiv(9:0)+8] /
[MDiv(5:0)+2]
-
-
M Divider Programming
bit (5:0)
-
-
-
-
-
-
-
Watch Dog Safe Freq
Programming bits
-
-
-
-
Byte 10
-
Writing to these bit will
configure the safe
frequency as Byte0 bit
(4:0).
The decimal
representation of M and
N Divier in Byte 11 and
12 will configure the
CPU VCO frequency.
Default at power up =
latch-in or Byte 0 Rom
table. VCO Frequency =
14.318 x [NDiv(9:0)+8] /
[MDiv(5:0)+2]
These Spread Spectrum
bits in Byte 13 and 14
will program the spread
pecentage of CPU



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