AM29BDS128HD8 datasheet(39/89 Pages) SPANSION

39 / 89 page

May 10, 2006 27024B3

Am29BDS128H/Am29BDS640H

D A TA

SH EE T

SA represents the sector address. The device ID is

read in three cycles.

The system must write the reset command to return to

the read mode (or erase-suspend-read mode if the

bank was previously in Erase Suspend).

Enter SecSi™ Sector/Exit SecSi Sector

Command Sequence

The SecSi Sector region provides a secured data area

containing a random, eight word electronic serial num-

ber (ESN). The system can access the SecSi Sector

region by issuing the three-cycle Enter SecSi Sector

command sequence. The device continues to access

the SecSi Sector region until the system issues the

four-cycle Exit SecSi Sector command sequence. The

Exit SecSi Sector command sequence returns the de-

vice to normal operation. The SecSi Sector is not ac-

cessible when the device is executing an Embedded

Program or embedded Erase algorithm. Table 20,

“Memory Array Command Definitions,” on page 46

shows the address and data requirements for both

command sequences.

Program Command Sequence

Programming is a four-bus-cycle operation. The

program command sequence is initiated by writing two

unlock write cycles, followed by the program set-up

command. The program address and data are written

next, which in turn initiate the Embedded Program

algorithm. The system is not required to provide further

controls or timings. The device automatically provides

internally generated program pulses and verifies the

programmed cell margin. Table 20, “Memory Array

Command Definitions,” on page 46 shows the address

and data requirements for the program command

sequence.

When the Embedded Program algorithm is complete,

that bank then returns to the read mode and addresses

are no longer latched. The system can determine the

status of the program operation by monitoring DQ7 or

DQ6/DQ2. Refer to the “Write Operation Status”

section on page 48 for information on these status bits.

Any commands written to the device during the

Embedded Program Algorithm are ignored. Note that a

hardware reset immediately terminates the program

operation. The program command sequence should be

reinitiated once that bank has returned to the read

mode, to ensure data integrity.

Programming is allowed in any sequence and across

sector boundaries. A bit cannot be programmed from

“0” back to a “1.” Attempting to do so may cause that

bank to set DQ5 = 1, or cause the DQ7 and DQ6 status

bit to indicate the operation was successful. However,

a succeeding read will show that the data is still “0.”

Only erase operations can convert a “0” to a “1.”

Unlock Bypass Command Sequence

The unlock bypass feature allows the system to prima-

rily program to a bank faster than using the standard

program command sequence. The unlock bypass

command sequence is initiated by first writing two

unlock cycles. This is followed by a third write cycle

containing the unlock bypass command, 20h. The

device then enters the unlock bypass mode. A

two-cycle unlock bypass program command sequence

is all that is required to program in this mode. The first

cycle in this sequence contains the unlock bypass

program command, A0h; the second cycle contains the

program address and data. Additional data is pro-

grammed in the same manner. This mode dispenses

with the initial two unlock cycles required in the stan-

dard program command sequence, resulting in faster

total programming time. The host system may also ini-

tiate the chip erase and sector erase sequences in the

unlock bypass mode. The erase command sequences

are four cycles in length instead of six cycles. Table 20,

“Memory Array Command Definitions,” on page 46

shows the requirements for the unlock bypass

command sequences. The Unlock Bypass Reset

command is required to return to reading array data

when the bank is in the unlock bypass mode.

During the unlock bypass mode, only the Read, Unlock

Bypass Program, Unlock Bypass Sector Erase, Unlock

Bypass Chip Erase, and Unlock Bypass Reset com-

Table 19.

Autoselect Data

Description

Address

Read Data

Manufacturer

(BA) + 00h

0001h

Device ID,

Word 1

(BA) + 01h

227Eh (BDS128H)

221Eh (BDS640H)

Device ID,

Word 2

(BA) + 0Eh

2218h (BDS128H)

2201h (BDS640H)

Device ID,

Word 3

(BA) + 0Fh

2200h

Sector

Protection

Verification

(SA) + 02h

0001h (locked),

0000h (unlocked)

Indicator Bits

(BA) + 03h

DQ15 - DQ8 = 0

DQ7: Factory Lock Bit

1 = Locked, 0 = Not Locked

DQ6: Customer Lock Bit

1 = Locked, 0 = Not Locked

DQ5: Handshake Bit

1 = Reduced Wait-state

Handshake,

0 = Standard Handshake

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