AM29LV320D datasheet(21/55 Pages) SPANSION

21 / 55 page

November 15, 2004

Am29LV320D

Once the SecSi Sector is locked and verified,

the system must write the Exit SecSi Sector

Region command sequence to return to reading

and writing the remainder of the array.

The SecSi Sector protection must be used with

caution since, once protected, there is no pro-

cedure available for unprotecting the SecSi

Sector area and none of the bits in the SecSi

Sector memory space can be modified in any

way.

Figure 3. SecSi Sector Protect Verify

Hardware Data Protection

The command sequence requirement of unlock

cycles for programming or erasing provides

data protection against inadvertent writes (re-

fer to Table 14, on page 29 for command defi-

nitions). In addition, the following hardware

data protection measures prevent accidental

erasure or programming, which might other-

wise be caused by spurious system level signals

during VCC power-up and power-down transi-

tions, or from system noise.

Low VCC Write Inhibit

When VCC is less than VLKO, the device does not

accept any write cycles. This protects data dur-

ing VCC power-up and power-down. The com-

mand register and all internal program/erase

circuits are disabled, and the device resets to

the read mode. Subsequent writes are ignored

until VCC is greater than VLKO. The system must

provide the proper signals to the control pins to

prevent unintentional writes when VCC is

greater than VLKO.

Write Pulse “Glitch” Protection

Noise pulses of less than 5 ns (typical) on OE#,

CE# or WE# do not initiate a write cycle.

Logical Inhibit

Write cycles are inhibited by holding any one of

OE# = VIL, CE# = VIH or WE# = VIH. To initiate

a write cycle, CE# and WE# must be a logical

zero while OE# is a logical one.

Power-Up Write Inhibit

If WE# = CE# = VIL and OE# = VIH during

power up, the device does not accept com-

mands on the rising edge of WE#. The internal

state machine is automatically reset to the read

mode on power-up.

COMMON FLASH MEMORY

INTERFACE (CFI)

The Common Flash Interface (CFI) specification

outlines device and host system software inter-

rogation handshake, which allows specific ven-

dor-specified software algorithms to be used

for entire families of devices. Software support

can then be device-independent, JEDEC ID-in-

dependent, and forward- and backward-com-

patible for the specified flash device families.

Flash vendors can standardize their existing in-

terfaces for long-term compatibility.

This device enters the CFI Query mode when

the system writes the CFI Query command,

98h, to address 55h in word mode (or address

AAh in byte mode), any time the device is

ready to read array data. The system can read

CFI information at the addresses given in

Table 9, on page 22 through Table 12, on

page 24. To terminate reading CFI data, the

system must write the reset command.

The system can also write the CFI query com-

mand when the device is in the autoselect

mode. The device enters the CFI query mode,

and the system can read CFI data at the ad-

dresses given in Table 9, on page 22 through

Table 12, on page 24. The system must write

the reset command to return the device to the

reading array data.

For further information, please refer to the CFI

Specification and CFI Publication 100, available

v i a

the

Wo rld

W i de

We b

a t

http://www.amd.com/flash/cfi. Alternatively,

contact an AMD representative for copies of

these documents.

Write 60h to

any address

Write 40h to SecSi

Sector address

with A6 = 0,

A1 = 1, A0 = 0

START

RESET# =

VIH or VID

Wait 1

µs

Read from SecSi

Sector address

with A6 = 0,

A1 = 1, A0 = 0

If data = 00h,

SecSi Sector is

unprotected.

If data = 01h,

SecSi Sector is

protected.

Remove VIH or VID

from RESET#

Write reset

command

SecSi Sector

Protect Verify

complete

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