ST72361 datasheet(91/224 Pages) STMICROELECTRONICS

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ST72361

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10.5 8-BIT TIMER (TIM8)

10.5.1 Introduction

The timer consists of a 8-bit free-running counter

driven by a programmable prescaler.

It may be used for a variety of purposes, including

pulse length measurement of up to two input sig-

nals (input capture) or generation of up to two out-

put waveforms (output compare and PWM).

Pulse lengths and waveform periods can be mod-

ulated from a few microseconds to several milli-

seconds using the timer prescaler and the clock

prescaler.

10.5.2 Main Features

■ Programmable prescaler: fCPU divided by 2, 4 , 8

or fOSC2 divided by 8000.

■ Overflow status flag and maskable interrupt

■ Output compare functions with

– 2 dedicated 8-bit registers

– 2 dedicated programmable signals

– 2 dedicated status flags

– 1 dedicated maskable interrupt

■ Input capture functions with

– 2 dedicated 8-bit registers

– 2 dedicated active edge selection signals

– 2 dedicated status flags

– 1 dedicated maskable interrupt

■ Pulse width modulation mode (PWM)

■ One pulse mode

■ Reduced Power Mode

■ 4 alternate functions on I/O ports (ICAP1, ICAP2,

OCMP1, OCMP2)*

The Block Diagram is shown in Figure 1.

*Note: Some timer pins may not be available (not

bonded) in some ST7 devices. Refer to the device

pin out description.

When reading an input signal on a non-bonded

pin, the value will always be ‘1’.

10.5.3 Functional Description

10.5.3.1 Counter

The main block of the Programmable Timer is a 8-

bit free running upcounter and its associated 8-bit

registers.

These two read-only 8-bit registers contain the

same value but with the difference that reading the

ACTR register does not clear the TOF bit (Timer

overflow flag), located in the Status register, (SR).

Writing in the CTR register or ACTR register re-

sets the free running counter to the FCh value.

Both counters have a reset value of FCh (this is

the only value which is reloaded in the 8-bit timer).

The reset value of both counters is also FCh in

One Pulse mode and PWM mode.

The timer clock depends on the clock control bits

of the CR2 register, as shown in Table 1. The val-

ue in the counter register repeats every 512, 1024,

2048 or 20480000 fCPU clock cycles depending on

the CC[1:0] bits.

The timer frequency can be fCPU/2, fCPU/4, fCPU/8

or fOSC2 /8000.

For example, if fOSC2/8000 is selected, and

fOSC2 = 8 MHz, the timer frequency will be 1 ms.

Refer to Table 1 on page 16.

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