PCA9547_2

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

Product data sheet

Rev. 02 — 12 September 2006

6 of 26

Philips Semiconductors

PCA9547

6.

Functional description

6.1 Device addressing

Following a START condition, the bus master must output the address of the slave it is

accessing. The address of the PCA9547 is shown in Figure 5. To conserve power, no

internal pull-up resistors are incorporated on the hardware selectable address pins and

they must be pulled HIGH or LOW.

The last bit of the slave address defines the operation to be performed. When set to

logic 1 a read is selected, while a logic 0 selects a write operation.

6.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the PCA9547, which will be stored in the Control register. If multiple bytes are

received by the PCA9547, it will save the last byte received. This register can be written

6.2.1 Control register definition

A SCx/SDx downstream pair, or channel, is selected by the contents of the control

register. This register is written after the PCA9547 has been addressed. The 4 LSBs of

the control byte are used to determine which channel is to be selected. When a channel is

selected, the channel will become active after a STOP condition has been placed on the

made active, so that no false conditions are generated at the time of connection.

Fig 5.

Slave address

002aaa962

1

1

1

0

A2

A1

A0 R/W

fixed

hardware

selectable

Fig 6.

Control register

002aaa963

X

X

X

X

B3

B2

B1

B0

channel selection bits

(read/write)

76543210

enable bit