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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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APR9/D датащи(PDF) 88 Page - NXP Semiconductors |
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APR9/D датащи(HTML) 88 Page - NXP Semiconductors |
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88 / 101 page  4-14 DSP56001A/D, Rev. 1 MOTOROLA DSP56001A Application Examples Figure 4-5 shows a circuit that waits until VCC on the DSP56001A is at least 4.5 V before initiating a 75,000 × T C oscillator stabilization delay required for the on-chip oscillator (only 25 × TC is required for an external oscillator). This insures that the DSP is operational and stable before releasing the reset signal. Figure 4-5 Reset Circuit Using MC34064/MC33064 Note: 1. IRQA, and IRQB must be driven to the logic levels appropriate for the application. 2. MODA and MODB must be driven to the logic levels appropriate for the application. RESET 1.2 VREF +5V MC34064 U1 MC33064 2 (2) 3 (4) 1 (1) CDLY R tDLY = RCDLY In 1 1 - VTH VIN - VOL Where: Logic Reset tDLY = 75,000 TC minimum VIN = 5 V fOSC = 20 MHz VTH = 2.5 V VOL = 0.4 V CDLY = 1 mf ± 20% TC = 50 ns R = 8.2 K ± 5% + – AA0908 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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