AND8020/D

http://onsemi.com

16

Figure 21. Differential and Single−Ended AC

Rpu 25 k

W to 100 kW

Receiver

OUT

OUT

IN

INb

1 k

W

* 0.001

mF

0.001

mF

Rpu 25 k

W to 100 kW

Receiver

OUT

OUT

IN

1 k

W

* 0.001

mF

0.01 − 0.001

mF

* High Voltage Cap May Be Needed

0.01 − 0.001

mF

A. Differential

B. Single−Ended

In Figure 21A, the IN line has a 1 k

presenting a 1 K

W impedance across the differential signal

lines. This assumes the signal impedance matching has been

accomplished prior to the cap coupling, on the driver side of

cap. Locate the coupling capacitor as physically close to the

input pin as possible to minimize the trace length and

diminish potential reflections due to the impedance

mismatch.

If signal impedance matching has not been accomplished

prior to the cap coupling, then a characteristic impedance

receiver side of the cap. The value of the Rpu resistor would

be adjusted to produce an acceptable null signal default

voltage drop.

If the differential inputs to the AC coupled device are left

open or if the driving signals are lost, both receiver input pin

value. Sustained oscillation may autonomously result from

a combination of ambient environmental noise, the device

small signal gain, and feedback from the output to the input

through parasitic capacitive and inductive paths.

As a differential receiver input voltage diverges, the

output responds by transitioning toward a state voltage. A

sufficient voltage

D across the receiver inputs will force the

output to state level. Depending on conditions, about 10 to

50 mV is sufficient to suppress instability oscillation and

force a determined state on the output.

this input voltage

D may be accomplished by injecting a

resistor, Rpu, on ONE input line. The value of Rpu could

range from 25 k

W to 100 kW. As Rpu increases, the phase

error is diminished and the susceptibility to oscillation

increases.

Generally, an internal pull−down resistor ranging in value

from 52 k

W to 75 kW is deployed on an input pin. On some

D−bar (Invert) input pins an additional 36 k

W to 75 kW

resistor is deployed to suppress oscillation by forcing a

determined state on the output under open input or null

voltage conditions. A minimum input voltage

D of 20 to

30 mV may be effective depending on noise, gain, and

layout.

a device, the reference level may be ported from a generator

as illustrated in Figure 22. Any of the “16” type buffers are

buffer. For example, the E416, EL16, LVEL16, EP16,

16

RT

0.01

mF

1 K

W

may be supplied to bias receiver inputs to provide an

Range) DC reference to the receiver (see specific device data

sheet). Signal impedance matching may be accomplished

prior to cap coupling, allowing a wide range values for a

rebiasing resistor network.