AND8020 datasheet(6/18 Pages) AD

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AND8020/D

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Internal Termination Resistors

Internal termination conveniently uses 50

W values for Rt,

with the most popular being Z0. Note the internal termination

allows the Combo Pin node, Vt, from the internal resistors to

be connected to an external VTT supply, typically at

VCC − 2.0 V, as shown in Figure 5. Alternatively, this Combo

Pin may be pulled to VEE through an external resistor to form

a “Y” type termination variant, as shown in Figure 5. See the

“Y Variance” topic and the “Y Term Table” for Rt3 resistor

values.

Figure 5. Combo Pin VTT or “Y” Connection with

Internal Parallel Termination

VTT

(*or twisted pair)

Driver

Receiver

*T−Line Z0

VTT Connection

VEE

(*or twisted pair)

Driver

Receiver

*T−Line Z0

Y Connection

Rt3

Example Calculations

Ideally, VTT supply tracks 1:1 with VCC; however, supply

tolerances need to be considered. Assume for instance a

MC10EP16, +85

°C, nominal +3.3 VCC, terminated 50 W (Rt)

to VTT, where VTT is VCC − 2.0 V, or 1.3 V:

IOHmax of (VCC ) * 0.885 V

IOLmin of (VCC ) * 1.685 V

resulting in the nominal case:

IOHmax +

(VOHmax * VTT )

(3.3

* 0.885) * 1.3

+ 22.3 mA

IOLmin +

(VOLmin * VTT )

(3.3

* 1.685) * 1.3

+ 6.3 mA

If +5% tolerances are assumed, two worst case conditions result.

Case #1: VCCmin = VCC − 5%, VTTmax = VTT + 5%

((3.135

* 0.885) * 1.365)

+ 17.7 mA

IOHmax +

(VOHmax * VTT)

IOLmin +

(VOLmin * VTT)

((3.135

* 1.685) * 1.365)

+ 1.7 mA

Case #2: VCCmin + 5%, VTTmax − 5%

((3.465

* 0.885) * 1.235)

+ 26.9 mA

IOHmax +

(VOHmax * VTT)

((3.465

* 1.685) * 1.235)

+ 1.09 mA

IOLmin +

(VOLmin * VTT)

Y Variance

The “Y” termination for a differential pair may be

preferred when avoiding the use of a VTT supply. The design

is shown in Figure 6 and utilizes the following formulas for

calculating resistor values which are found in the Y Term

Table. The voltage at the Node where Rt1, Rt2, and Rt3

connect remains at a static VTT voltage of VCC − 2.0 V, or

1.3 V.

Rt3 + Rt1

VTT

* VEE

VOH ) VOL * 2VTT

Rt1 + Rt2 + Z0

(eq. 10)

(eq. 11)

VTT +

Rt3 (VOH ) VOL ) ) (Rt1 *VEE )

Rt1 ) 2Rt3

(eq. 12)

Figure 6. “Y” Variance

Driver

Receiver

*T−Line Z0

VCC

* or Twisted Pair

Rt1

Rt2

Rt3

C1 0.1−0.01 mF

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