DATA SHEET

ICS844256DGI REVISION A AUGUST 5, 2010

1

©2010 Integrated Device Technology, Inc.

FemtoClock® Crystal-to-LVDS Frequency

Synthesizer w/Integrated Fanout Buffer

ICS844256DI

General Description

The ICS844256DI is a Crystal-to-LVDS Clock Synthesizer/Fanout

Buffer designed for SONET and Gigabit Ethernet applications. The

output frequency can be set using the frequency select pins and a

25MHz crystal for Ethernet frequencies, or a 19.44MHz crystal for

SONET. The low phase noise characteristics of the ICS844256DI

make it an ideal clock for these demanding applications.

Features

• Six differential LVDS output pairs

• Crystal oscillator interface

• Output frequency range: 62.5MHz - 625MHz

• Crystal input frequency range:15.625MHz - 25.5MHz

• RMS phase jitter @ 125MHz, using a 25MHz crystal

(1.875MHz – 20MHz): 0.43ps (typical)

• Full 3.3V or mixed 3.3V core, 2.5V output supply mode

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package

Divider Function Table

Inputs

Function

FB_SEL

N_SEL1

N_SEL0

M Divider Value

N Divider Value

M/N Divider Value

000

25

1

25

0

0

1

25

2

12.5

010

25

4

6.25

0

1

1

25 (default)

5

5

100

32

1

32

101

32

2

16

110

32

4

8

111

32

8

4

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VDDO

Q3

VDDO

VDDA

nQ3

nQ2

Q4

Q2

nQ4

nQ1

Q5

Q1

nQ5

nQ0

N_SEL1

N_SEL0

VDD

XTAL_OUT

FB_SEL

XTAL_IN

Q0

GND

PLL_BYPASS

GND

1

0

PLL

M

Feedback

Divider

OSC

Q3

nQ3

Q4

nQ4

Q5

nQ5

Q0

nQ0

Q1

nQ1

Q2

nQ2

N_SEL0

N_SEL1

PLL_BYPASS

FB_SEL

XTAL_IN

XTAL_OUT

Pulldown

Pullup

Pullup

Pullup

N

Output

Divider

ICS844256DI

24-Lead TSSOP, E-Pad

4.40mm x 7.8mm x 0.925mm

package body

G Package

Top View

Block Diagram

Pin Assignment