FN2142 Rev 2.00

Page 1 of 9

September 1995

FN2142

Rev 2.00

September 1995

HCS74MS

Radiation Hardened Dual-D Flip-Flop with Set and Reset

DATASHEET

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm2/mg

• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 1012 RAD (Si)/s

• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55oC to +125oC

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

 5A at VOL, VOH

Description

The Intersil HCS74MS is a Radiation Hardened positive

edge triggered flip-flop with set and reset.

The HCS74MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS74MS is supplied in a 14 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14, LEAD FINISH C

TOP VIEW

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14, LEAD FINISH C

TOP VIEW

R1N

D1

CP1

S1N

Q1

Q1N

GND

VCC

R2N

D2

CP2

S2N

Q2

Q2N

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

R1

D1

CP1

S1

Q1

Q1

GND

VCC

R2

D2

CP2

S2

Q2

Q2

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCS74DMSR

-55oC to +125oC

Intersil Class S Equivalent

14 Lead SBDIP

HCS74KMSR

-55oC to +125oC

Intersil Class S Equivalent

14 Lead Ceramic Flatpack

HCS74D/Sample

+25oC

Sample

14 Lead SBDIP

HCS74K/Sample

+25oC

Sample

14 Lead Ceramic Flatpack

HCS74HMSR

+25oCDie

Die