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83C751 датащи(PDF) 18 Page - NXP Semiconductors |
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83C751 датащи(HTML) 18 Page - NXP Semiconductors |
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18 / 24 page ![]() Philips Semiconductors Product specification 83C751/87C751 80C51 8-bit microcontroller family 2K/64 OTP/ROM, I2C, low pin count 1998 May 01 18 Programming and Verifying Security Bits Security bits are programmed employing the same techniques used to program the USER EPROM and KEY arrays using serial data streams and logic levels on port pins indicated in Table 6. When programming either security bit, it is not necessary to provide address or data information to the 87C751 on ports 1 and 3. Verification occurs in a similar manner using the RESET serial stream shown in Table 6. Port 3 is not required to be driven and the results of the verify operation will appear on ports 1.6 and 1.7. Ports 1.7 contains the security bit 1 data and is a logical one if programmed and a logical zero if not programmed. Likewise, P1.6 contains the security bit 2 data and is a logical one if programmed and a logical zero if not programmed. Erasure Characteristics Erasure of the EPROM begins to occur when the chip is exposed to light with wavelengths shorter than approximately 4,000 angstroms. Since sunlight and fluorescent lighting have wavelengths in this range, exposure to these light sources over an extended time (about 1 week in sunlight, or 3 years in room level fluorescent lighting) could cause inadvertent erasure. For this and secondary effects, it is recommended that an opaque label be placed over the window. For elevated temperature or environments where solvents are being used, apply Kapton tape Flourless part number 2345–5 or equivalent. The recommended erasure procedure is exposure to ultraviolet light (at 2537 angstroms) to an integrated dose of at least 15W-s/cm2. Exposing the EPROM to an ultraviolet lamp of 12,000 µW/cm2 rating for 20 to 39 minutes, at a distance of about 1 inch, should be sufficient. Erasure leaves the array in an all 1s state. Table 6. Implementing Program/Verify Modes OPERATION SERIAL CODE P0.1 (PGM/) P0.2 (VPP) Program user EPROM 296H –* VPP Verify user EPROM 296H VIH VIH Program key EPROM 292H –* VPP Verify key EPROM 292H VIH VIH Program security bit 1 29AH –* VPP Program security bit 2 298H –* VPP Verify security bits 29AH VIH VIH NOTE: * Pulsed from VIH to VIL and returned to VIH. A0–A10 ADDRESS STROBE PROGRAMMING PULSES VPP/VIH VOLTAGE SOURCE CLK SOURCE RESET CONTROL LOGIC 87C751 P3.0–P3.7 P0.0/ASEL P0.1 P0.2 XTAL1 RESET VCC VSS P1.0–P1.7 +5V DATA BUS SU00317 Figure 5. Programming Configuration MIN 2 MACHINE CYCLES TEN BIT SERIAL CODE BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 UNDEFINED UNDEFINED XTAL1 RESET P0.2 P0.1 SU00302 Figure 6. Entry into Program/Verify Modes |
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