AT45DB161E datasheet(14/77 Pages) RENESAS

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DS-AT45DB161E-8782 Rev. P

Page 14

1/27/23

AT45DB161E Datasheet

6.5

Continuous Array Read (Low Power Mode: 01h Opcode)

This command is ideal for applications that want to minimize power consumption and do not need to read the

memory array at high frequencies. Like the 03h opcode, this Continuous Array Read command allows reading the

main memory array sequentially without the need for dummy bytes to be clocked in after the address byte

sequence. The memory can be read at clock frequencies up to maximum specified by fCAR3. To perform a

Continuous Array Read using the standard DataFlash page size (528 bytes), the CS pin must first be asserted,

and then an opcode of 01h must be clocked into the device followed by three address bytes. The first 12 bits

(PA11 - PA0) of the 22-bit address sequence specify which page of the main memory array to read and the last 10

bits (BA9 - BA0) of the 22-bit address sequence specify the starting byte address within the page. To perform a

Continuous Array Read using the binary page size (512 bytes), the opcode 01h must be clocked into the device

followed by three address bytes (A20 - A0). Following the address bytes, additional clock pulses on the SCK pin

result in data being output on the SO pin.

The CS pin must remain low during the loading of the opcode, the address bytes, and the reading of data. When

the end of a page in the main memory is reached during a Continuous Array Read, the device continues reading

at the beginning of the next page with no delays incurred during the page boundary crossover (the crossover from

the end of one page to the beginning of the next page). When the last bit in the main memory array has been read,

the device continues reading back at the beginning of the first page of memory. As with crossing over page

boundaries, no delays are incurred when wrapping around from the end of the array to the beginning of the array.

A low-to-high transition on the CS pin terminates the read operation and tri-state the output pin (SO). The

maximum SCK frequency allowable for the Continuous Array Read is defined by the fCAR3 specification. The

Continuous Array Read bypasses both data buffers and leaves the contents of the buffers unchanged.

6.6

Main Memory Page Read

A Main Memory Page Read allows the reading of data directly from a single page in the main memory, bypassing

both of the data buffers and leaving the contents of the buffers unchanged. To start a page read using the

standard DataFlash page size (528 bytes), an opcode of D2h must be clocked into the device followed by three

address bytes (which comprise the 22-bit page and byte address sequence) and four dummy bytes. The first 12

bits

(PA11 - PA0) of the 22-bit address sequence specify the page in main memory to be read and the last 10 bits

(BA9 - BA0) of the 22-bit address sequence specify the starting byte address within that page. To start a page

read using the binary page size (512 bytes), the opcode D2h must be clocked into the device followed by three

address bytes and four dummy bytes. The first 12 bits (A20 - A9) of the 21-bit address sequence specify which

page of the main memory array to read, and the last nine bits (A8 - A0) of the 21-bit address sequence specify the

starting byte address within that page. The dummy bytes that follow the address bytes are sent to initialize the

read operation. Following the dummy bytes, the additional pulses on SCK result in data being output on the SO

(serial output) pin.

The CS pin must remain low during the loading of the opcode, the address bytes, the dummy bytes, and the

reading of data. Unlike the Continuous Array Read command, when the end of a page in main memory is

reached, the device continues reading back at the beginning of the same page rather than the beginning of the

next page.

A low-to-high transition on the CS pin terminates the read operation and tri-state the output pin (SO). The

maximum SCK frequency allowable for the Main Memory Page Read is defined by the fSCK specification. The

Main Memory Page Read bypasses both data buffers and leaves the contents of the buffers unchanged.

6.7

Buffer Read

The SRAM data buffers can be accessed independently from the main memory array, and using the Buffer Read

command allows data to be sequentially read directly from either one of the buffers. Four opcodes, D4h or D1h for

Buffer 1 and D6h or D3h for Buffer 2, can be used for the Buffer Read command. The use of each opcode

depends on the maximum SCK frequency that is used to read data from the buffers. The D4h and D6h opcode

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