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STM32U5A5QJ датащи(PDF) 74 Page - STMicroelectronics

номер детали STM32U5A5QJ
подробное описание детали  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI, crypto
PDF  382 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32U5A5QJ датащи(HTML) 74 Page - STMicroelectronics

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Functional overview
STM32U5Axxx
74/382
DS13543 Rev 1
The ADF converts an input data stream into clean decimated digital data words. This
conversion is done thanks to low-pass digital filters and decimation blocks. In addition it is
possible to insert a high-pass filter or a DC offset correction block.
The conversion speed and resolution are adjustable according to configurable parameters
for digital processing: filter type, filter order, decimation ratio. The maximum output data
resolution is up to 24 bits. There are two conversion modes: single conversion and
continuous modes. The data can be automatically stored in a system RAM buffer through
DMA, thus reducing the software overhead.
A SAD (sound activity detector) is available for the detection of “speech-like” signals. The
SAD is connected at the output of DFLT0. Several parameters can be programmed to adjust
properly the SAD to the sound environment. The SAD can strongly reduce the power
consumption by preventing the storage of samples into the system memory as long as the
observed signal does not match the programmed criteria.
A flexible trigger interface can be used to control the start of conversion of the ADF.
All the digital processing is performed using only the kernel clock. The ADF requests the bus
interface clock (AHB clock) only when data must be transfered or when a specific event
requests the attention of the system processor.
The ADF main features are:
•
AHB interface
•
One serial digital input:
–
Configurable SPI interface to connect various digital sensors
–
Configurable Manchester coded interface support
–
Compatible with PDM interface to support digital microphones
•
Two common clocks input/output for Σ∆ modulators
•
Flexible BSMX for connection between filters and digital inputs
•
One flexible digital filter path, including:
–
A configurable CIC filter:
- Can be configured in Sinc4 filter
- Can be configured in Sinc5 filter
- Adjustable decimation ratio
–
A reshape filter to improve the out-off band rejection and in-band ripple
–
A high-pass filter to cancel the DC offset
–
Gain control
–
Saturation blocks
•
Clock absence detector
•
Sound activity detector
•
16- or 24-bit signed output data resolution
•
Continuous or single conversion
•
Possibility to delay independently each bitstream
•
Various trigger possibilities
•
Autonomous mode in Stop 0, Stop 1 and Stop 2 modes
•
Wake-up from Stop with all interrupts
•
DMA can be used to read the conversion data



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