Preliminary Technical Data

Rev. PrA 15-Nov-04| Page 12 of 27

Pin No.

Mnemonic

Function

16

ISCC

This pin us used in association with an external resistor to AGND to program the

short-circuit current of the output amplifiers.

17

AGNDD

Ground Reference Pin for DAC D Output amplifier.

18

VOUTD

Analog Output Voltage of DAC D. Buffered output with a nominal full-scale output

range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF

load.

19

VOUTC

Analog Output Voltage of DAC C. Buffered output with a nominal full-scale output

range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF

load.

20

AGNDC

Ground Reference Pin for DAC C Output Amplifier.

21

AGNDB

Ground Reference pin for DAC B Output Amplifier.

22

VOUTB

Analog Output Voltage of DAC B. Buffered output with a nominal full-scale output

range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF

load.

23

VOUTA

Analog Output Voltage of DAC A. Buffered output with a nominal full-scale output

range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF

load.

24

AGNDA

Ground Reference Pin for DAC A Output Amplifier.

25

REFAB

External Reference Voltage Input for Channels A and B. Reference input range is 1 V

to 5 V; programs the full-scale output voltage. REFIN = 5 V for specified performance.

26

REFCD

External Reference Voltage Input for Channels C and D. Reference input range is 1 V

to 5 V; programs the full-scale output voltage. REFIN = 5 V for specified performance.

27

REFOUT

Reference Output. This is the buffered reference output from the internal voltage

reference. The internal reference is 5 V ± 1 mV, with a reference tempco of 10

ppm/°C.

28

REFGND

Reference Ground Return for the Reference Generator and Buffers.

29

TEMP

This pin provides an output voltage proportional to temperature. The output

voltage is 1.5 V typical at 25°C; variation with temperature is 5 mV/°C.

32

BIN/2sCOMP

Determines the DAC Coding. When set to a logic high, input coding is offset binary.

When set to a logic low, input coding is twos complement. (See Table 6 and Table 7)