VSC8530-05 datasheet(21/80 Pages) MICROSEMI

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Functional Descriptions

VMDS-10516 VSC8530-05 Datasheet Revision 4.1

device does not loop back the fast link pulse after a specific time, register bit 23E1.9:8 automatically

resets to 10.

If the VSC8530-05 PHY reports that the link partner requires PoE, the Ethernet switch must enable

inline-power on this port, independent of the PHY.

The PHY automatically disables inline-powered device detection when the register bits 23E1.9:8

automatically reset to 10, and then automatically changes to its normal auto-negotiation process. A

link is then autonegotiated and established when the link status bit is set (register bit 1.2 is set to 1).

In the event of a link failure (indicated when register bit 1.2 reads 0), it is recommended that the

inline-power be disabled to the inline-powered device independent of the PHY. The VSC8530-05

PHY disables its normal auto-negotiation process and re-enables its inline-powered device detection

mode.

3.7

IEEE 802.3af Power-over-Ethernet Support

The VSC8530-05 device is compatible with designs intended for use in systems that supply power to

data terminal equipment (DTE) by means of the MDI or twisted pair cable, as described in IEEE 802.3af

Clause 33.

3.8

ActiPHY Power Management

In addition to the IEEE-specified power down control bit (device register bit 0.11), the VSC8530-05

device also includes an ActiPHY power management mode for each PHY. This mode enables support for

power-sensitive applications. It utilizes a signal-detect function that monitors the media interface for the

presence of a link to determine when to automatically power down the PHY. The PHY wakes up at a

programmable interval and attempts to wake up the link partner PHY by sending a burst of fast link pulse

over copper media.

The ActiPHY power management mode is enabled on a per-port basis during normal operation at any

time by setting register bit 28.6 to 1.

The following operating states are possible when ActiPHY mode is enabled:

•

Low power state

•

Link partner wake-up state

•

Normal operating state (link-up state)

The VSC8530-05 device switches between the low power state and link partner wake-up state at a

programmable rate (the default is two seconds) until signal energy has been detected on the media

interface pins. When signal energy is detected, the PHY enters the normal operating state. If the PHY is

in its normal operating state and the link fails, the PHY returns to the low power state after the expiration

of the link status time-out timer. After reset, the PHY enters the low power state.

When auto-negotiation is enabled in the PHY, the ActiPHY state machine operates as described.

When auto-negotiation is disabled and the link is forced to use 10BASE-T or 100BASE-TX modes while

the PHY is in its low power state, the PHY continues to transition between the low power and link partner

wake-up states until signal energy is detected on the media pins. At that time, the PHY transitions to the

normal operating state and stays in that state even when the link is dropped. When auto-negotiation is

disabled while the PHY is in the normal operation state, the PHY stays in that state when the link is

dropped and does not transition back to the low power state.

The following illustration shows the relationship between ActiPHY states and timers.

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