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ADM7151 датащи(PDF) 7 Page - Analog Devices

номер детали ADM7151
подробное описание детали  Dual 500mA, Positive/Negative, Ultra-Low Noise, Ultra-High PSRR Low Dropout Linear Regulator
PDF  45 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADM7151 датащи(HTML) 7 Page - Analog Devices

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Data Sheet
LT3097
SPECIFICATIONS
analog.com
Rev. 0 | 7 of 45
Table 1. Electrical Characteristics (Continued)
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
PGFBN PIN
Trip Point
PGFBN trip-point rising
288
300
312
mV
Hysteresis
PGFBN trip-point hysteresis
7
mV
Current (IPGFBN)
VINN = –2.3 V, VPGFBN = –300 mV
30
100
nA
PGP PIN
Output Low Voltage
PGP current (IPGP) = 100 µA
30
100
mV
Leakage Current
PGP voltage (VPGP) = 20 V
1
µA
PGN PIN
Output Low Voltage
PGN current (IPGN) = 100 µA
17
50
mV
Leakage Current
PGN voltage (VPGN) = 20 V
1
µA
POSITIVE MINIMUM LOAD REQUIRED17
VOUTP < 1 V
10
µA
NEGATIVE MINIMUM LOAD REQUIRED18
VOUTN > –1.5 V
10
µA
POSITIVE THERMAL SHUTDOWN
TJ rising
165
°C
Hysteresis
8
°C
NEGATIVE THERMAL SHUTDOWN
TJ rising
167
°C
Hysteresis
8
°C
POSITIVE START-UP TIME
VOUTP(NOM) = 5 V, ILP = 500 mA, CSETP = 0.47 µF, VINP =
6 V, VPGFBP = 6 V
55
ms
VOUTP(NOM) = 5 V, ILP = 500 mA, CSETP = 4.7 µF, VINP = 6
V, VPGFBP = 6 V
550
ms
VOUTP(NOM) = 5 V, ILP = 500 mA, CSETP = 4.7 µF, VINP =
6 V, Positive Power-Good 1 resistance (RPGP1) = 50 kΩ,
Positive Power-Good 2 resistance (RPGP2) = 700 kΩ (with
positive fast start-up to 90% of VOUTP)
10
ms
NEGATIVE START-UP TIME
RSETN = 49.9 kΩ, VOUTN(NOM) = –5 V, ILN = 500 mA,
CSETN = 0.47 µF, VINN = –6 V, VPGFBN = –6 V
55
ms
RSETN = 49.9 kΩ, VOUTN(NOM) = –5 V, ILN = 500 mA,
CSETN = 4.7 µF, VINN = –6 V, VPGFBN = –6 V
550
ms
RSETN = 49.9 kΩ, VOUTN(NOM) = –5 V, ILN = 500 mA,
CSETN = 4.7 µF, VINN = –6 V, Negative Power-Good 1
resistance (RPGN1) = 50 kΩ, Negative Power-Good 2
resistance (RPGN2) = 700 kΩ (with negative fast start-up
to 90% of VOUTN)
10
ms
POSITIVE THERMAL REGULATION
10 ms pulse
–0.01
%/W
NEGATIVE THERMAL REGULATION
10 ms pulse
–0.01
%/W
POSITIVE REVERSE CURRENT
Input
VINP = –20 V, VENP/UVP = 0 V, VOUTP = 0 V, VSETP = 0 V
150
µA
Output
VINP = 0 V, VOUTP = 5 V, SETP = open, TA = 25°C
14
25
µA
1 The ENP/UVP pin threshold must be met to ensure device operation.
2 The ENN/UVN pin threshold must be met to ensure device operation.
3 The maximum TJ limits operating conditions. The regulated output-voltage specification does not apply for all possible combinations of input voltage and output current,
especially due to the internal current-limit foldback, which starts to decrease current limit at VINP – VOUTP > 12 V. If operating at the maximum output current, limit the
input-voltage range. If operating at the maximum input voltage, limit the output-current range.
4 The maximum TJ limits operating conditions. The regulated output-voltage specification does not apply for all possible combinations of input voltage and output current,
especially due to the internal current-limit foldback, which starts to decrease the current limit at VOUTN – VINN > 7 V. If operating at the maximum output current, limit the
input-voltage range. If operating at the maximum input voltage, limit the output-current range.
5 OUTSP connects directly to OUTP.
6 OUTSN connects directly to OUTN.



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