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LT3045 датащи(PDF) 40 Page - Analog Devices

номер детали LT3045
подробное описание детали  Dual 500mA, Positive/Negative, Ultra-Low Noise, Ultra-High PSRR Low Dropout Linear Regulator
PDF  45 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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LT3045 датащи(HTML) 40 Page - Analog Devices

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Data Sheet
LT3097
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 40 of 45
Negative Side Current Limit
=3.75 A×kΩ
RILIMN
(7)
For example, a 7.5 kΩ resistor programs the current limit to 500
mA, and a 15 kΩ resistor programs the current limit to 250 mA. For
good accuracy, Kelvin connect this resistor to the GND pin (pin 13)
of the LT3097.
When the INN-to-OUTN differential is greater than 7 V, the foldback
circuitry of the negative regulator of the LT3097 decreases the
internal current limit. As a result, the internal current limit can
override the externally programmed current-limit level to keep the
LT3097 within its SOA. See Figure 57.
ILIMN is not designed to serve as a current monitoring pin. If the
external current limit is not used, connect ILIMN to GND.
POSITIVE OUTPUT OVERSHOOT RECOVERY
During a load-step change from full load to no load (or light
load), the positive output voltage overshoots before the regulator
responds to turn the power transistor off. Given that there is no load
(or a light load) present at the positive output, it takes a long time to
discharge the output capacitor.
As shown in the Figure 122, the LT3097 incorporates an overshoot
recovery circuitry that turns on a current sink to discharge the
output capacitor in the event OUTSP is higher than SETP. This
current is typically about 4 mA. No load recovery is disabled for
positive input voltages less than 2.5 V or positive output voltages
less than 1.5 V.
If OUTSP is externally held more than SETP, the current sink turns
on in an attempt to restore OUTSP to its programmed voltage. The
current sink remains on until the external circuitry releases OUTSP.
NEGATIVE OUTPUT OVERSHOOT RECOVERY
During a load-step change from full load to no load (or light
load), the negative output voltage overshoots before the regulator
responds to turn the power transistor off. Given that there is no load
(or a light load) present at the negative output, it takes a long time
to discharge the output capacitor.
As illustrated in the Figure 123, the LT3097 incorporates an over-
shoot recovery circuitry that turns on a current source to discharge
the output capacitor in the event OUTSN is higher than SETN. This
current is typically about 3.5 mA.
If OUTSN is externally held more than SETN, the current source
turns on in an attempt to restore OUTSN to its programmed volt-
age. The current source remains on until the external circuitry
releases OUTSN.
PCB LAYOUT CONSIDERATIONS
Given the high bandwidth and ultra-high PSRR of the LT3097,
a careful PCB layout must be employed to achieve full device per-
formance. Figure 130 shows the EVAL-LT3097-AZ evaluation board
with a layout that delivers the full performance of the regulator.
For more details refer to the LT3097 evaluation board user guide
(EVAL-LT3097-AZ).
Figure 130. EVAL-LT3097-AZ Evaluation Board
THERMAL CONSIDERATIONS
The positive and negative regulators of the LT3097 have internal
power and thermal limiting circuits that protect the device under
overload conditions. The thermal shutdown temperature is nominal-
ly 165°C for the positive regulator and 167 °C for the negative
regulator, with about 8°C of hysteresis for each regulator. For
continuous normal load conditions, do not exceed the maximum
junction temperature of 125°C. It is important to consider all sour-
ces of thermal resistance from junction to ambient, which includes
junction to case, case to heatsink interface, heatsink resistance,
or circuit board to ambient as the application dictates. Additionally,
consider all heat sources close to the LT3097.
The underside of the DFN package has exposed metal from the
lead frame to the die attachment. Note that the exposed-pad
pin 23 is electrically connected to the ground (pin 19), and the
exposed-pad pin 24 is electrically connected to INN (pins 6 and 7).
This package allows heat to directly transfer from the die junction to
the PCB metal to limit the maximum operating junction temperature.
The dual, inline pin arrangement allows the metal to extend beyond
the ends of the package on the topside (component side) of the
PCB.
For surface-mount devices, heat sinking is accomplished by using
the heat-spreading capabilities of the PCB and its copper traces.
Copper board stiffeners and plated throughholes can also be used
to spread the heat generated by the LDO regulator.
Table 5 lists the thermal resistance as a function of the copper
area on a fixed board size. All measurements were taken in still
air on a 4-layer FR4 board with 1 oz solid internal planes and
2 oz top and bottom planes with a total board thickness of 1.6
mm. The four layers were electrically isolated with no thermal vias
present. PCB layers, copper weight, board layout, and thermal
vias affect the resultant thermal resistance. For more information



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