NSAM265SF datasheet(32/58 Pages) NSC

32 / 58 page

Appendix A

Device Specifications

This appendix describes the pins and signals of the

NSAM265SR and NSAM265SF CompactSPEECH proces-

sors specifies its maximum ratings and its electrical charac-

teristics and describes its timing

A1 PIN ASSIGNMENT

The following sections list the pins of the NSAM265SR and

NSAM265SF CompactSPEECH processors They indicate

which signals use the same pin and under what conditions

each signal is enabled for that pin Slashes separate the

names of signals that share the same pin

A11 Pin-Signal Assignment

Table A-1 shows all the pins and the signals that use them

in different configurations It also shows the type and direc-

tion of each signal

TABLE A-1 CompactSPEECH Pin-Signal Assignment under Different Conditions

Pin Name

Type

Signal Name

A(015)

TTL

A(015)

Output

CAS (Note A)

TTL1 (Note B)

CAS

Output

CCLK

TTL

CCLK

Output

CDIN

TTL

CDIN

Input

CDOUT

TTL

CDOUT

Output

CFS0

TTL

CFS0

Output

D(01)

TTL

D(01)

D2RA11

TTL

D2RA11

D(37)

TTL

D(37)

DWE

TTL1 (Note B)

DWE

Output

MWCS

TTL (Note C)

MWCS

Input

WR0 TST

TTL

WR0

Output

TST

Input

MWDRY

TTL

MWDRY

MWRQST

TTL

MWRQST

MWDOUT

TTL

MWDOUT

Output

PB(05) (Note D)

TTL

EA(1621)

Output

PB6 (Note E)

TTL

AFLASH

Output

EMCS ENV0

TTL1 (Note B)

EMCS

Output

CMOS (Note F)

ENV0

Input

MWCLK

TTL

MWCLK

Input

MWDIN

TTL

MWDIN

Input

RAS (Note A)

TTL1 (Note B)

RAS

Output

RESET

Schmitt (Note C)

RESET

Input

VCC

Power

VCC

VSS

Power

VSS

XTAL

OSC

X2CLKIN

XTAL

OSC

TTL

CLKIN

Input

Note A

Used in NSAM265SR only NC in NSAM265SF

Note B

TTL1 output signals provide CMOS levels in the steady state for small loads

Note C

Schmitt trigger input

Note D

NSAM265SR and NSAM265SFvirtual address lines for IVS ROM

NSAM265SF onlyvirtual address lines for FLASH

Note E

Used in NSAM265SF onlyenablesdisable FLASH

Note F

Input during reset CMOS level input

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