M95640-DF datasheet(26/53 Pages) STMICROELECTRONICS

номер детали	M95640-DF

подробное описание детали	64-Kbit serial SPI bus EEPROM with high-speed clock

PDF	53 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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Instructions

M95640-W M95640-R M95640-DF

26/53

DocID16877 Rev 19

6.6.1

Cycling with Error Correction Code (ECC)

M95640-x and M95640-Dx devices identified by the process letter K offer an Error

Correction Code (ECC) logic. The ECC is an internal logic function which is transparent for

the SPI communication protocol.

The ECC logic is implemented on each group of four EEPROM bytes(c). Inside a group, if a

single bit out of the four bytes happens to be erroneous during a Read operation, the ECC

detects this bit and replaces it with the correct value. The read reliability is therefore much

improved.

Even if the ECC function is performed on groups of four bytes, a single byte can be

written/cycled independently. In this case, the ECC function also writes/cycles the three

other bytes located in the same group(c). As a consequence, the maximum cycling budget is

defined at group level and the cycling can be distributed over the four bytes of the group: the

sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain

below the maximum value defined in Table 12.

c. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer.

M95640-DF датащи(PDF) 26 Page - STMicroelectronics