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M95128-DF датащи(PDF) 12 Page - STMicroelectronics

номер детали M95128-DF
подробное описание детали  128-Kbit serial SPI bus EEPROM with high-speed clock
PDF  48 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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M95128-DF датащи(HTML) 12 Page - STMicroelectronics

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6.1
Write enable (WREN)
The Write enable latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this
is to send a Write enable instruction to the device.
As shown in Figure 8. Write enable (WREN) sequence, to send this instruction to the device, Chip select (S) is
driven low, and the bits of the instruction byte are shifted in, on Serial data input (D). The device then enters a
wait state. It waits for the device to be deselected by Chip select (S) being driven high.
Figure 8. Write enable (WREN) sequence
MS41478V1
C
D
Q
2
1
3
4
5
6
7
High impedance
0
Instruction
S
M95128-W M95128-R M95128-DF
Write enable (WREN)
DS1356 - Rev 20
page 12/48



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