LIS2DUX12 datasheet(70/102 Pages) STMICROELECTRONICS

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10.12

MLC_INT2 (11h)

INT2 pin control register (R/W)

Each bit in this register enables a signal to be carried over INT2. The pin's output supplies the OR combination of

the selected signals.

Table 153. MLC_INT2 register

0(1)

INT2_MLC4

INT2_MLC3

INT2_MLC2

INT2_MLC1

1. This bit must be set to 0 for the correct operation of the device.

Table 154. MLC_INT2 register description

INT2_MLC4(1)

Enables routing MLC4 interrupt event to INT2. Default value: 0

(0: routing to INT2 disabled; 1: routing to INT2 enabled)

INT2_MLC3(1)

Enables routing MLC3 interrupt event to INT2. Default value: 0

(0: routing to INT2 disabled; 1: routing to INT2 enabled)

INT2_MLC2(1)

Enables routing MLC2 interrupt event to INT2. Default value: 0

(0: routing to INT2 disabled; 1: routing to INT2 enabled)

INT2_MLC1(1)

Enables routing MLC1 interrupt event to INT2. Default value: 0

(0: routing to INT2 disabled; 1: routing to INT2 enabled)

1. This bit is active if the INT2_EMB_FUNC bit of MD2_CFG (20h) is set to 1.

10.13

EMB_FUNC_STATUS (12h)

Embedded function status register (R)

Table 155. EMB_FUNC_STATUS register

IS_FSM_LC

IS_SIGMOT

IS_TILT

IS_STEP_DET

Table 156. EMB_FUNC_STATUS register description

IS_FSM_LC

Interrupt status bit for FSM long counter timeout interrupt event.

(1: interrupt detected; 0: no interrupt)

IS_SIGMOT

Interrupt status bit for significant motion detection

(1: interrupt detected; 0: no interrupt)

IS_TILT

Interrupt status bit for tilt detection

(1: interrupt detected; 0: no interrupt)

IS_STEP_DET

Interrupt status bit for step detection

(1: interrupt detected; 0: no interrupt)

LIS2DUX12

MLC_INT2 (11h)

DS14071 - Rev 2

page 70/102

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