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MCP6S93 датащи(PDF) 19 Page - Microchip Technology |
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MCP6S93 датащи(HTML) 19 Page - Microchip Technology |
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19 / 40 page ![]() 2004 Microchip Technology Inc. DS21908A-page 19 MCP6S91/2/3 4.2.3 RAIL-TO-RAIL OUTPUT The maximum output voltage swing is the maximum swing possible under a particular amplifier load current. The amplifier load current is the sum of the external load current (IOUT) and the current through the ladder resistance (ILAD); see Figure 4-2. EQUATION 4-1: FIGURE 4-2: Amplifier Load Current. See Figure 2-21 for the typical output headroom (VDD – VOH or VOL – VSS) as a function of amplifier load current. The specification table states the output can reach within 60 mV of either supply rail when RL =10 kΩ and VREF =VDD/2. 4.2.4 INPUT VOLTAGE AND PHASE REVERSAL The MCP6S91/2/3 amplifier family is designed with CMOS input devices. It is designed to not exhibit phase inversion when the input pins exceed the supply voltages. Figure 2-29 shows an input voltage exceeding both supplies with no resulting phase inversion. The maximum voltage that can be applied to the input pins (CHx) is VSS –0.3V to VDD + 0.3V. Voltages on the inputs that exceed this absolute maximum rating can cause excessive current to flow into or out of the input pins. Current beyond ±2 mA can cause possible reliability problems. Applications that exceed this rating must be externally limited with an input resistor, as shown in Figure 4-3. FIGURE 4-3: RIN limits the current flow into an input pin. 4.3 Resistor Ladder The resistor ladder shown in Figure 4-1 (RLAD =RF +RG) sets the gain. Placing the gain switches in series with the inverting input reduces the parasitic capacitance, distortion and gain mismatch. RLAD is an additional load on the output of the PGA and causes additional current draw from the supplies. It is also a load (ZIN_REF) on the external circuitry driving the VREF pin. In Shutdown mode, RLAD is still attached to the VOUT and VREF pins. Thus, these pins and the internal ampli- fier’s inverting input are all connected through RLAD and the output is not High-Z (unlike the internal op amp). While RLAD contributes to the output noise, its effect is small. Refer to Figure 2-12. Where: Amplifier Load Current I OUT I LAD + = I LAD V OUT V REF – () R LAD ------------------------------------- = VOUT VREF RLAD IOUT ILAD MCP6S9X CHx RIN VIN RIN ≥ VSS – (Maximum expected VIN) 2 mA RIN ≥ (Maximum expected VIN) – VDD 2 mA VOUT |
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