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PCF8576DT датащи(PDF) 31 Page - NXP Semiconductors |
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PCF8576DT датащи(HTML) 31 Page - NXP Semiconductors |
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31 / 41 page ![]() 2004 Dec 22 31 Philips Semiconductors Product specification Universal LCD driver for low multiplex rates PCF8576D 12 BONDING PAD INFORMATION Table 15 Bonding pad locations All x/y coordinates represent the position of the centre of each pad (in µm) with respect to the centre (x/y = 0) of the chip (see Fig.23). Table 16 Gold bump dimension PCF8576DU/2DA/2 SYMBOL PAD COORDINATES xy SDA 1 −34.38 −876.6 SCL 2 +109.53 −876.6 SCL 3 +181.53 −876.6 SYNC 4 +365.58 −876.6 CLK 5 +469.08 −876.6 VDD 6 +577.08 −876.6 OSC 7 +740.88 −876.6 A0 8 +835.83 −876.6 A1 9 +1005.48 −630.9 A2 10 +1005.48 −513.9 SA0 11 +1005.48 −396.9 VSS 12 +1005.48 −221.4 VLCD 13 1005.48 10.71 BP0 14 1005.48 156.51 BP2 15 1005.48 232.74 BP1 16 1005.48 308.97 BP3 17 1005.48 385.2 S0 18 1005.48 493.2 S1 19 1005.48 565.2 S2 20 1005.48 637.2 S3 21 1005.48 709.2 S4 22 347.22 876.6 S5 23 263.97 876.6 S6 24 180.72 876.6 S7 25 97.47 876.6 S8 26 14.22 876.6 S9 27 −69.03 +876.6 S10 28 −152.28 +876.6 S11 29 −235.53 +876.6 S12 30 −318.78 +876.6 S13 31 −402.03 +876.6 S14 32 −485.28 +876.6 S15 33 −568.53 +876.6 S16 34 −651.78 +876.6 S17 35 −735.03 +876.6 S18 36 −1005.5 +625.59 S19 37 −1005.5 +541.62 S20 38 −1005.5 +458.19 S21 39 −1005.5 +374.76 S22 40 −1005.5 +291.33 S23 41 −1005.5 +207.9 S24 42 −1005.5 +124.47 S25 43 −1005.5 +41.04 S26 44 −1005.5 −42.39 S27 45 −1005.5 −125.8 S28 46 −1005.5 −209.3 S29 47 −1005.5 −292.7 S30 48 −1005.5 −376.1 S31 49 −1005.5 −459.5 S32 50 −1005.5 −543 S33 51 −1005.5 −625.6 S34 52 −735.03 −876.6 S35 53 −663.03 −876.6 S36 54 −591.03 −876.6 S37 55 −519.03 −876.6 S38 56 −447.03 −876.6 S39 57 −375.03 −876.6 SDA 58 −196.38 −876.6 SDA 59 −106.38 −876.6 Alignment marks C1 +930.42 −870.3 C2 −829.98 −870.3 DESCRIPTION DIMENSION Gold bump dimension 52 µm × 80 µm × 15 µm Gold bump tolerance 3 µm SYMBOL PAD COORDINATES xy |
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