LTC3113 datasheet(24/32 Pages) AD

24 / 32 page

LT3154

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

InboostmodethepowerstagegainisreducedbyVIN/2•VOUT:

Boost DC Gain at 1.8VIN

20 Log

10A

•2Ω •1.8V

2•3.3V

⎛

⎝

⎜

⎞

⎠

⎟

=15dB

The output load pole will move depending on the output

load resistance. The power stage gains and pole locations

at full load are shown in Figure 6 and Figure 7.

Output LoadPole (Buck)

2π •RLOAD •COUT

2π •2Ω •100µF

= 800Hz

Output LoadPole (Boost)

2π •RLOAD •COUT

2π •2Ω •100µF

=1600Hz

The resulting power stage crossover frequencies are

around 16kHz in buck mode (VIN > 3.3V), 8.5kHz in boost

mode at 1.8VIN.

The uncompensated power stage crossover frequency is

lower than the goal of 20kHz. More importantly, the uncom‑

pensatedpowerstageDCgainislowespeciallyinboostmode.

A pole‑zero‑pole network will now be added to the voltage

amplifier to increase the DC gain, increase the crossover

frequency, and reduce the overall gain at high frequencies.

VEA Pole 1 =

πRVEA •CC

RVEA = Voltage Error Amp output resistance, which is ap‑

proximately5MΩ.Thispoleismentionedforcompleteness,

but has no effect on the overall loop design.

VEA Zero 1 =

π RC•CC

crossover frequency to flatten the VA gain at the crossover

to improve phase margin

VEA Pole 2 =

π RC•CHF

crossover frequency to reduce the gain to suppress noise

and mitigate any RHPZ effects.

Referring to the buck power stage gain curves in Figure 6,

the loop gain needs to be increased by 3dB to achieve a

total loop crossover frequency of 20kHz. Assuming Zero

1 is placed well below the crossover frequency and Pole 2

is placed well above the crossover frequency, the voltage

amplifiers gain at crossover is given by:

VEA gain at crossover:

20Log

VFB •gm •RC

VOUT

⎛

⎝

⎜

⎞

⎠

⎟= 20Log

1V •110µA/V •RC

3.3V

⎛

⎝

⎜

⎞

⎠

⎟= 3dB

Where gm is the VEA transconductance, VFB/VOUT is the

feedback divider gain, and RC is the external zero resistor:

RC=

3.3V

1V •110µA/V

•103dB/20dB = 40.2kΩ

A 60k value for RC will provide 3dB of gain at crossover.

With RC selected, CC’s value is determined by setting the

Zero 1 frequency at 1/5 the crossover frequency or 4kHz:

CC=

2π •RC• fZERO1

2π •40.2kΩ •4kHz

=1nF

Optionally, a high frequency Pole 2 is set at 20 times the

crossover frequency to provide a high frequency pole at

400kHz:

CHF =

2π •RC• fPOLE2

2π •40.2kΩ •400kHz

=10pF

VEAGaininFigure 6orFigure 7showstheresultingvoltage

error amplifier (VEA) response to the selected values.

CombiningthepowerstageandVEAfrequencyresponses,

the measured total loop gains are illustrated in Figure 6

and Figure 7. As shown, the crossover frequency was in‑

creased to 20kHz in buck mode, 10kHz in boost mode. The

phase margin at crossover is around 70°C in both cases.

The VEA loop design provided the additional benefits of

high gain (>60dB) at DC and gain attenuation above the

crossover frequency to prevent RHPZ issues.

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