RT9204CS datasheet(7/14 Pages) RICHTEK

7 / 14 page

Preliminary

RT9204

DS9204-00 February 2002

www.richtek-ic.com.tw

Functional Pin Description

GND (Pin 1)

Signal and power ground for the IC. All voltage levels

are measured with respect to this pin.

VCC (Pin 2)

This is the main bias supply for the RT9204. This pin

also provides the gate bias charge for the lower

MOSFETs gate. The voltage at this pin monitored for

power-on reset (POR) purpose. This pin is also the

internal 6.0V regulator output powered from BOOT pin

when BOOT pin is directly powered from ATX 12V.

DRV (Pin 3)

This pin is linear regulator output driver. Connect to

external bypass NPN transistor base or NMOSFET

gate terminal.

FBL (Pin 4)

This pin is connected to the linear regulator output

divider. This pin also connects to internal linear

regulator error amplifier inverting input and protection

monitor.

FB (Pin 5)

This pin is connected to the PWM converter’s output

divider. This pin also connects to internal PWM error

amplifier inverting input and protection monitor.

SD (Pin 6)

Active low design with a 40

µA pull low current source.

Pull this pin to VCC to shutdown both PWM and linear

regulator.

BOOT (Pin 7)

This pin provides ground referenced bias voltage to

the upper MOSFET driver. A bootstrap circuit is used

to create a voltage suitable to drive a logic-level N-

channel MOSFET when operating at a single 5V

power supply. This pin also could be powered from

ATX 12V, in this situation, an internal 6.0V regulator

will supply to VCC pin for internal voltage bias.

UGATE (Pin 8)

Connect UGATE pin to the PWM converter’s upper

MOSFET gate. This pin provides the gate drive for the

upper MOSFET.

RT9204CS датащи(PDF) 7 Page - Richtek Technology Corporation

RT9204CS датащи(HTML) 7 Page - Richtek Technology Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

датащи скачать

ссылки URL