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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H757AI датащи(PDF) 229 Page - STMicroelectronics |
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STM32H757AI датащи(HTML) 229 Page - STMicroelectronics |
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229 / 251 page  DS12931 Rev 1 229/251 STM32H757xI Electrical characteristics 230 Figure 69. Ethernet MII timing diagram JTAG/SWD interface characteristics Unless otherwise specified, the parameters given in Table 130 and Table 131 for JTAG/SWD are derived from tests performed under the ambient temperature, frcc_c_ck frequency and VDD supply voltage summarized in Table 23: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 0x10 • Capacitive load CL=30 pF • Measurement points are done at CMOS levels: 0.5VDD • VOS level set to VOS1 Refer to Section 6.3.18: I/O port characteristics for more details on the input/output characteristics: Table 130. Dynamics JTAG characteristics Symbol Parameter Conditions Min Typ Max Unit Fpp TCK clock frequency 2.7V <VDD< 3.6 V - - 37 MHz 1/tc(TCK) 1.62 <VDD< 3.6 V - - 27.5 tisu(TMS) TMS input setup time - 2.5 - - tih(TMS) TMS input hold time - 1 - - tisu(TDI) TDI input setup time - 1.5 - - - tih(TDI) TDI input hold time - 1 - - - tov(TDO) TDO output valid time 2.7V <VDD< 3.6 V - 8 13.5 - 1.62 <VDD< 3.6 V - 8 18 - toh(TDO) TDO output hold time - 7 - - - ai15668b MII_RX_CLK MII_RXD[3:0] MII_RX_DV MII_RX_ER td(TXEN) td(TXD) tsu(RXD) tsu(ER) tsu(DV) tih(RXD) tih(ER) tih(DV) MII_TX_CLK MII_TX_EN MII_TXD[3:0] |
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