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MSP34X2G датащи(PDF) 22 Page - Micronas

номер детали MSP34X2G
подробное описание детали  Multistandard Sound Processor Family with Dolby Surround Pro Logic
PDF  104 Pages
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производитель  MICRONAS [Micronas]
домашняя страница  http://www.micronas.com
Logo MICRONAS - Micronas

MSP34X2G датащи(HTML) 22 Page - Micronas

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MSP 34x2G
PRELIMINARY DATA SHEET
22
Micronas
3.1.3. Description of CONTROL Register
3.1.4. Protocol Description
Write to DSP or Demodulator
Read from DSP or Demodulator
Write to Control or Test Registers
Read from Control Register
Note: S =
I2C-Bus Start Condition from master
P =
I2C-Bus Stop Condition from master
ACK =
Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller dark gray)
NAK =
Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’
or from MSP indicating internal error state
Wait =
I2C-Clock line is held low, while the MSP is processing the I2C command.
This waiting time is max. 1 ms
Table 3–3: CONTROL as a Write Register
Name
Subaddress
Bit[15] (MSB)
Bits[14:0]
CONTROL
00 hex
1 : RESET
0 : normal
0
Table 3–4: CONTROL as a Read Register (only MSP 34x2G-versions from A2 on)
Name
Subaddress
Bit[15] (MSB)
Bit[14]
Bits[13:0]
CONTROL
00 hex
Reset status after last reading of CONTROL:
0 : no reset occured
1 : reset occured
Internal hardware status:
0 : no error occured
1 : internal error occured
not of interest
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on,
bit[15] of CONTROL will be set; it must be
read once to be resetted.
Swrite
device
address
Wait
ACK sub-addr ACK addr-byte
high
ACK addr-byte
low
ACK data-byte-
high
ACK data-byte
low
ACK
P
Swrite
device
address
Wait
ACK sub-addr ACK addr-byte
high
ACK addr-byte
low
ACK
S
read
device
address
Wait
ACK data-byte-
high
ACK data-byte
low
NAK
P
Swrite
device
address
Wait
ACK sub-addr ACK data-byte
high
ACK data-byte
low
ACK
P
Swrite
device
address
Wait
ACK
00hex
ACK
S
read
device
address
Wait
ACK data-byte-
high
ACK data-byte
low
NAK
P



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