NAND01G-B datasheet(33/59 Pages) STMICROELECTRONICS

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NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B

DATA PROTECTION

The device has both hardware and software fea-

tures to protect against program and erase opera-

tions.

It features a Write Protect, WP, pin, which can be

used to protect the device against program and

erase operations. It is recommended to keep WP

at VIL during power-up and power-down.

In addition, to protect the memory from any invol-

untary program/erase operations during power-

transitions, the device has an internal voltage de-

tector which disables all functions whenever VCC

is below 1.5V.

The device features a Block Lock mode, which is

enabled by setting the Power-Up Read Enable,

Lock/Unlock Enable, PRL, signal to High.

The Block Lock mode has two levels of software

protection.

■

Blocks Lock/Unlock

■

Blocks Lock-down

Refer to Figure 21. for an overview of the protec-

tion mechanism.

Blocks Lock

All the blocks are locked simultaneously by issuing

a Blocks Lock command (see Table 10.).

All blocks are locked after power-up and when the

Write Protect signal is Low.

Once all the blocks are locked, one sequence of

consecutive blocks can be unlocked by using the

Blocks Unlock command.

Refer to Figure 25., Command Latch AC Wave-

forms for details on how to issue the command.

Blocks Unlock

A sequence of consecutive locked blocks can be

unlocked, to allow program or erase operations, by

issuing an Blocks Unlock command (see Table

10.).

The Blocks Unlock command consists of four

steps:

■

One bus cycle to setup the command

■

two or three bus cycles to give the Start Block

Address (refer to Table 8. , Table 9. and

Figure 19.)

■

one bus cycle to confirm the command

■

two or three bus cycles to give the End Block

Address (refer to Table 8. , Table 9.and Figure

19.).

The Start Block Address must be nearer the logi-

cal LSB (Least Significant Bit) than End Block Ad-

dress.

If the Start Block Address is the same as the End

Block Address, only one block is unlocked.

Only one consecutive area of blocks can be un-

locked at any one time. It is not possible to unlock

multiple areas.

Figure 19. Blocks Unlock Operation

Note: Three address cycles are required for 2,4 and 8 Gb devices. The 512Mb and 1Gb devices only require two address cycles.

I/O

Start Block Address, 3 cycles

ai08670

23h

Blocks Unlock

Command

Add1

Add2

Add3

24h

Add1

Add2

Add3

End Block Address, 3 cycles

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