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www.diodes.com

April 2019

Diodes Incorporated

PI7C9X760

Document Number DS40305 Rev 6-2

A product Line of

Diodes Incorporated

PI7C9X760

An I2C sub-address is sent by the I2C master following the slave address. The sub-address contains the UART register address being

accessed. A read or write transaction is determined by bit-0 of the slave address (HIGH = Read, LOW = Write). Table 10 below lists

the functions of the bits in the I2C sub-address.

Table 10: I2C Sub-Address (Register Address)

Bit

Function

7

Reserved

6:3

UART Internal Register Address A3:A0

2:1

UART Channel Select

’00’ = UART Channel A

Other values are reserved

0

Reserved

After the last read or write transaction, the I2C-bus master will set the SCL signal back to its idle state (HIGH).

10.1 I2C-bus Addressing

There could be many devices on the I2C-bus. To distinguish itself from the other devices on the I2C-bus, there are eight possible slave

addresses that can be selected for the UART using the A1 and A0 address lines. Table 9 below shows the different addresses that can

be selected. Note that there are two different ways to select each I2C address.

Table 9: I2C Address Map

A1

A0

I2C ADDRESS

VDD

VDD

0x90 (1001 000X)

VDD

VSS

0x92 (1001 001X)

VDD

SCL

0x94 (1001 010X)

VDD

SDA

0x96 (1001 011X)

VSS

VDD

0x98 (1001 100X)

VSS

VSS

0x9A (1001 101X)

VSS

SCL

0x9C (1001 110X)

VSS

SDA

0x9E (1001 111X)

SCL

VDD

0xA0 (1010 000X)

SCL

VSS

0xA2 (1010 001X)

SCL

SCL

0xA4 (1010 010X)

SCL

SDA

0xA6 (1010 011X)

SDA

VDD

0xA8 (1010 100X)

SDA

VSS

0xAA (1010 101X)

SDA

SCL

0xAC (1010 110X)

SDA

SDA

0xAE (1010 111X)