APR34709

Document number: DS41354 Rev. 5 - 3

8 of 13

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June 2022

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APR34709

Synchronous Rectification Principle Description (continued)

Minimum On/Off Time

When the controlled MOSFET gate is turned on, some ringing noise is generated. The minimum on-time timer blanks the VTHOFF comparator,

keeping the controlled MOSFET on for at least the minimum on time. During the minimum on time, the turn off threshold is totally blanked.

After the SR driver turns off, the SR control block initiates a minimum off time timer during which the SR will remain off to prevent the ringing from

turning on the synchronous MOSFET.

The Value and Meaning of AREF Resistor

As to DCM operation Flyback converter, after the secondary rectifier stops conducting, the primary MOSFET drain-to-source ringing waveform

results from the resonant of primary inductance and the equivalent output capacitance. This ringing waveform probably leads to Synchronous

Rectifier error conduction. To prevent this fault from happening, the APR34709 has a special function design by means of volt-second product

detecting. Regarding the sensed voltage of VDET pin, the volt-second product of voltage above VCC at primary switch on time is much higher than

that of each cycle ringing voltage above VCC. Therefore, every time before Synchronous Rectifier turns on, the APR34709 judges if the detected

volt-second product of VDET voltage above VCC is higher than a threshold and then turns on synchronous Rectifier. The purpose of AREF resistor

is to determine the volt-second product threshold. The APR34709 has a parameter, Kqs, which converts RAREF value to volt-second product.

Kqs

*

R

2

Area

AREF



In general, the Area1 and Area3 values depend on the system design and are always fixed if the system design is frozen. As to Diodes

Incorporated’s PSR design, the Area1 value changes with primary peak current value and Area3 value generally keeps constant at all conditions.

So the AREF resistor design should consider the worst case, the minimum primary peak current condition. Because of system design parameter

distribution, Area1 and Area3 have moderate tolerance. So Area2 should be designed in the middle of Area1 and Area3 to ensure enough design

margins.

Area1

Kqs

*

R

3

Area

AREF





VDET

VCC

Area3

Area1=(VDET-VCC)*tONP

Area2=Kqs*RAREF

Figure 2. AREF Function

SR Minimum Operating Voltage

The APR34709 sets a minimum SR operating voltage by comparing the difference between VDET and output voltage (VCC). The value of VDET–

VCC must be higher than its internal reference, then the APR34709 will begin to integrate the area of (VDET–VCC)*tONP. If not, the area integrating

will not begin and the SR driver will be disabled.