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L9177ATR датащи(PDF) 27 Page - STMicroelectronics |
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L9177ATR датащи(HTML) 27 Page - STMicroelectronics |
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27 / 55 page ![]() Figure 19. Power-up sequence GAPGPS00603 VB VDD_SB Key_IN V_Key_H Vth_UV Tht STBY Wake_Up T_key_deglitch On State Td_UV_rst State VDD RESET Figure 20. Power-down sequence GAPGPS00604 VB VDD_SB Key_IN V_Key_L VDD RESET Vth_UV TfUV_reset Reset signal detects a VDD undervoltage longer than TfUV_reset by going to low level. When VDD recovers to normal level Reset signal returns to high level after Power_On_UV_Reset_Delay time (Td_UV_RST). The Reset signal resets all the internal SPI registers to default value. 3.4 SPI SPI is a standard four wires interface, that communicates with a data word of 24 bits. By means of SPI all the channels can be driven in serial way and diagnosis is sent out.Timing of SPI's operations are reported in Figure 17. The input data (DIN) is read on the rising edge of the SPI's clock (SCLK), in the same way the output data (DOUT) must be read by the Microcontroller on the SCLK's rising edge. 3.4.1 Data in (DIN) DIN command is used to turn On/Off internal channels which do not have Parallel Input command, and to clear diagnostic latches. DIN is decoded at the end of the frame if the integrity checks are passed. L9177A SPI DS12175 - Rev 5 page 27/55 |
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