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STA8090GA датащи(PDF) 26 Page - STMicroelectronics |
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STA8090GA датащи(HTML) 26 Page - STMicroelectronics |
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26 / 32 page ![]() Electrical characteristics STA8090GA 26/32 DS10820 Rev 5 4.8.3 OSCI oscillator specifications The supported values of the embedded BOOT ROM are 16.368 MHz, 24.00 MHz, 26.00 MHz and 48.00 MHz. The default values supported by the GNSS binary image is 26 MHz and 48 MHz, to enable USB peripheral the 48 MHz is mandatory. 4.8.4 ADC specifications This section gives the AC specification of the 10 bit Successive Approximation Register ADC embedded in STA8090GA device. It is controlled by the ARM9 MCU through a wrapper and an APB bridge as depicted in Figure 4 and it has a maximum conversion rate of 1MSPS with 8 muxed analog input channels capability. An internal voltage reference is used and analog/digital power supplies connections are implemented inside the device without any needs of dedicated external pins. Figure 4. SARADC connections Table 23. Characteristics of external slow clock input Symbol Parameter Min. Typ. Max. Unit TJIT (cc) Cycle-to-cycle jitter -70 — 70 ps TJIT (per) Period jitter -70 — 70 ps Variation -500 — 500 ppm TDUTY Duty cycle 45 — 55 % REFP REFN AIN0 AIN1 AIN7 VREF D[9:0] SARADC ADC WRAPPER VINL1 VDD12_MVR APB Bridge2 ADC_IN1 ADC_IN2 ADC_IN8 GND |
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