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STA8090GA

General description

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3.4.6

GPIO

The GPIO block provides thirteen (13) programmable inputs or outputs. Each input or output

can be controlled in two modes:



software mode through an APB bus interface



alternate mode, where GPIO becomes a peripheral input or output line

Any GPIO input can be independently enabled or disabled (masked) for interrupt

generation. User can select for each GPIO which edge (rising, falling, both) will trigger an

interrupt.

3.4.7

ADC

10 bit SAR ADC operating at 1.8 V analog supply. It can convert up to 2 single ended

channels with analog input multiplexer at 500KSPS

3.4.8

RTC

This is an always-on power domain dedicated to RTC logic (backup system) with 32 Kbyte

SRAM and supplied with a dedicated voltage regulator.

The RTC provides a high resolution clock which can be used for GPS. It keeps the time

when the system is inactive and can be used to wake the system up when a programmed

alarm time is reached. It has a clock trimming feature to compensate for the accuracy of the

32.768 kHz crystal and a secured time update.

RTC features



47-bit counter clocked by 32.768 kHz clock



32-bit for the integer part (seconds) and 15-bit for the fractional part



The integer part and the fractional part are readable independently



The counter, once enabled, can be stopped



Integer part load register (32-bit)



Fractional part load register (15-bit)



Load bit to transfer the content of the entire load register (integer+fractional part) to the

47-bit counter. Once set by the MCU this bits is cleared by the hardware to signal to the

MCU that the RTC has been updated.

3.4.9

MSP

The STA8090GA provides one MSP transmitter block.



Element (data) size from 8 to 32 bits, LSB or MSB first



Programmable frequency shift clock for data transfer



Direct interface to SPI compliant devices



Transmit first-in, first-out memory buffers (FIFOs), 32-bit wide, 8 locations deep