L99DZ200G datasheet(47/198 Pages) STMICROELECTRONICS

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DS13220 Rev 5

47/198

L99DZ200G

Electrical specifications

197

3.4.21

Fail safe low-side switch

The voltages are referred to power ground and currents are assumed positive, when the

current flows into the pin. 6 V ≤ VS ≤ 18 V; Tj = 40 °C to 150 °C, unless otherwise specified.

Table 27. Electro-chrome mirror driver

Item

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

A.138

VCTRLmax

Maximum EC-control

voltage

ECV_HV (Config Reg) = 1(1)

1.4

1.6

A.139

ECV_HV (Config Reg) = 0(1)

1.12

1.28

A.140

DNLECV

Differential Non Linearity

-2

LSB(2)

A.141

IdVECVI

Voltage deviation

between target and ECV

dVECV =Vtarget(3) -VECV;

IIECDRI < 1 µA

-5% -

1LSB(2)

+5% +

1LSB(2)

A.142

dVECVnr

Difference voltage

between target and ECV

sets flag if VECV is below

dVECV = Vtarget(3) - VECV;

toggle bitx = 1; status reg. x

120

A.143

dVECVhi

Difference voltage

between target and ECV

sets flag if VECV is

above it

dVECV = Vtarget(3) - VECV;

toggle bitx = 1; status reg. x

-135

A.144

tFECVNR

ECVNR filter time

Tested by scan

µs

A.145

tFECVHI

ECVHI filter time

Tested by scan

µs

A.146

VECDRminHIGH

Output voltage range

IECDR = -10 µA

V1 -0.3

A.147

VECDRmaxLOW

IECDR = 10 µA

0.7

A.148

IECDR

Current into ECDR

Vtarget(3) > VECV + 500 mV;

VECDR = 3.5 V

-100

-10

µA

A.149

Vtarget(3) < VECV - 500 mV;

VECDR = 1.0 V;

Vtarget = 0 V; VECV = 0.5 V

100

µA

A.150

Recdrdis

Pull-down resistance at

ECDR in fast discharge

mode and while EC-

mode is off

VECDR = 0.7 V; ECON = ‘1’,

EC<5:0> = 0 or ECON = ‘0’

kΩ

1. Bit ECV_HV (Config Reg) ='1' or ‘0’: ECV voltage, where IIECDR can change sign.

2. 1 LSB (Least Significant Bit) = 23.8 mV typ.

3. Vtarget is set by bits EC<5:0> (CR 11) and bit ECV_HV (Config Reg); tested for each individual bit.

Table 28. Fail safe low-side switch

Item

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

A.151

VOUT_max

Max output voltage in

case of missing supply

IOUT = 1 mA;

VS = VSREG = 0 V

22.5

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