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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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OPA310 датащи(PDF) 53 Page - Texas Instruments |
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OPA310 датащи(HTML) 53 Page - Texas Instruments |
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53 / 55 page  www.ti.com EXAMPLE BOARD LAYOUT 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND 16X (0.24) 16X (0.6) ( 0.2) TYP VIA 12X (0.5) (2.8) (2.8) (0.58) TYP ( 1.68) (R0.05) ALL PAD CORNERS (0.58) TYP WQFN - 0.8 mm max height RTE0016C PLASTIC QUAD FLATPACK - NO LEAD 4219117/B 04/2022 SYMM 1 4 5 8 9 12 13 16 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 17 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METAL SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL |
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