CC2430-RTR1-F32Z datasheet(41/234 Pages) TI

41 / 234 page

CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 41 of 232

12.3.3 Data Pointers

The

CC2430 has two data pointers, DPTR0

and DPTR1 to accelerate the movement of

data blocks to/from memory. The data pointers

are generally used to access CODE or XDATA

space e.g.

MOVC A,@A+DPTR

MOV A,@DPTR.

The data pointer select bit, bit 0 in the Data

Pointer Select register DPS, chooses which

data pointer shall be the active one during

execution of an instruction that uses the data

pointer, e.g. in one of the above instructions.

The data pointers are two bytes wide

consisting of the following SFRs:

•

DPTR0 – DPH0:DPL0

•

DPTR1 – DPH1:DPL1

DPH0 (0x83) – Data Pointer 0 High Byte

Bit

Name

Reset

R/W

Description

7:0

DPH0[7:0]

R/W

Data pointer 0, high byte

DPL0 (0x82) – Data Pointer 0 Low Byte

Bit

Name

Reset

R/W

Description

7:0

DPL0[7:0]

R/W

Data pointer 0, low byte

DPH1 (0x85) – Data Pointer 1 High Byte

Bit

Name

Reset

R/W

Description

7:0

DPH1[7:0]

R/W

Data pointer 1, high byte

DPL1 (0x84) – Data Pointer 1 Low Byte

Bit

Name

Reset

R/W

Description

7:0

DPL1[7:0]

R/W

Data pointer 1, low byte

DPS (0x92) – Data Pointer Select

Bit

Name

Reset

R/W

Description

7:1

0x00

Not used

DPS

R/W

Data pointer select. Selects active data pointer.

0 : DPTR0

1 : DPTR1

12.3.4 XDATA Memory Access

The

CC2430

provides an additional SFR

instructions MOVX A,@Ri and MOVX @Ri,A.

MPAGE gives the 8 most significant address

bits, while the register Ri gives the 8 least

significant bits.

In some 8051 implementations, this type of

XDATA access is performed using P2 to give

the most significant address bits. Existing

software may therefore have to be adapted to

make use of MPAGE instead of P2.

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