CC2430-RTR1-F64Z datasheet(177/234 Pages) TI

177 / 234 page

CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 177 of 232

The

interrupt

generated

RFSTATUS.FIFOP

and

also

the

RFSTATUS.FIFO and RFSTATUS.FIFOP

supervising the RXFIFO. Please note that

these status bits are only related to the

RXFIFO, even if

CC2430 is in transmit

mode.

A DMA transfer should be used to read

data from the RXFIFO. In this case a DMA

channel can be setup to use the RADIO

DMA trigger (see DMA triggers on page

92) to initiate a DMA transfer using the

RFD register as the DMA source.

Multiple data frames may be in the

RXFIFO simultaneously, as long as the

total number of bytes does not exceed

128.

See the RXFIFO overflow section on page

170 for details on how a RXFIFO overflow

is detected and signaled.

14.18 Address Recognition

CC2430 includes hardware support for

address recognition, as specified in [1].

Hardware address recognition may be

enabled

disabled

using

the

MDMCTRL0H.ADDR_DECODE control bit.

Address recognition uses the following RF

registers

•

IEEE_ADDR7-IEEE_ADDR0

•

PANIDH:PANIDL

•

SHORTADDRH:SHORTADDRL.

Address recognition is based on the

following requirements, listed from section

7.5.6.2 in [1]:

•

The frame type subfield shall not

contain an illegal frame type

•

If the frame type indicates that the

frame is a beacon frame, the

source PAN identifier shall match

macPANId unless macPANId is

equal to 0xFFFF, in which case

the

beacon

frame

shall

accepted regardless of the source

PAN identifier.

•

If a destination PAN identifier is

included in the frame, it shall

match macPANId or shall be the

broadcast

PAN

identifier

(0xFFFF).

•

If a short destination address is

included in the frame, it shall

match either macShortAddress or

the broadcast address (0xFFFF).

Otherwise

extended

destination address is included in

the

frame,

shall

match

aExtendedAddress.

•

If only source addressing fields

are included in a data or MAC

command frame, the frame shall

only be accepted if the device is a

PAN coordinator and the source

PAN

identifier

matches

macPANId.

If any of the above requirements are not

satisfied and address recognition is

enabled,

CC2430 will disregard the

incoming frame and flush the data from

the RXFIFO. Only data from the rejected

frame is flushed, data from previously

accepted frames may still be in the

RXFIFO.

Incoming frames are first subject to frame

type filtering according to the setting of the

MDMCTRL0H.FRAMET_FILT register bit.

Following the required frame type filtering,

incoming frames with reserved frame

types (FCF frame type subfield is 4, 5, 6 or

are

however

accepted

the

RESERVED_FRAME_MODE control bit in the

RF register MDMCTRL0H is set. In this

case, no further address recognition is

performed on these frames. This option is

included for future expansions of the IEEE

802.15.4 standard.

If a frame is rejected,

CC2430 will only start

searching for a new frame after the

rejected frame has been completely

received (as defined by the length field) to

avoid detecting false SFDs within the

frame.

The

MDMCTRL0.PAN_COORDINATOR

control bit must be correctly set, since

parts of the address recognition procedure

requires knowledge about whether the

current device is a PAN coordinator or not.

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