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MMPF0100 датащи(PDF) 39 Page - NXP Semiconductors

номер детали MMPF0100
подробное описание детали  14 channel configurable power management integrated circuit
PDF  137 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100 датащи(HTML) 39 Page - NXP Semiconductors

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39
PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
Figure 11. SW1A/B/C single phase block diagram
6.4.4.3.2
SW1A/B single phase - SW1C independent mode
In this configuration, SW1A/B is connected as a single phase with a single inductor, while SW1C is used as an independent output, using
its own inductor and configurations parameters. This configuration allows reduced component count by using only one inductor for SW1A/
B. As mentioned before, SW1A/B and SW1C operate independently from one another, thus, they can be operated with a different voltage
set point for normal, standby, and sleep modes, as well as switching mode selection and on/off control. Figure 12 shows the physical
connection for SW1A/B in single phase and SW1C as an independent output.
Driver
Controller
SW1AIN
SW1ALX
SW1FB
ISENSE
COSW1A
CINSW1A
LSW1
I2C
Interface
SW1A/B/C
SW1AMODE
SW1AFAULT
VIN
Driver
Controller
SW1BIN
SW1BLX
ISENSE
CINSW1B
SW1BMODE
SW1BFAULT
VIN
EA
Z1
Z2
Internal
Compensation
VREF
DAC
I2C
Driver
Controller
EA
Z1
Z2
Internal
Compensation
SW1CIN
SW1CLX
SW1CFB
ISENSE
CINSW1C
EP
SW1CMODE
SW1CFAULT
VREF
DAC
I2C
VIN



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