MCP6V51-ESLASHMS datasheet(6/50 Pages) MICROCHIP

6 / 50 page

MCP6V51/2/4

DS20006136B-page 6



2018-2022 Microchip Technology Inc. and its subsidiaries

AC ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +4.5V to +45V, VSS = GND,

VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 100 pF (refer to Figure 1-4 and Figure 1-5).

Parameters

Sym.

Min. Typ. Max. Units

Conditions

Amplifier AC Response

Gain Bandwidth Product

GBWP

—

1.8

—

MHz VDD = 4.5V, VIN = 10 mVpp, Gain = 100

—

MHz VDD = 45V, VIN = 10 mVpp, Gain = 100

Slew Rate

—

1.2

—

V/µs

See Figure 2-45

Phase Margin

—

deg.

VDD = 45V

Amplifier Noise Response

Input Noise Voltage

Eni

—

0.1

—

µVP-P f = 0.01 Hz to 1 Hz

Eni

—

0.21

—

µVP-P f = 0.1 Hz to 10 Hz

Input Noise Voltage Density

eni

—

10.2

—

nV/√Hz f = 1 kHz

Input Noise Current Density

ini

—

fA/√Hz

Amplifier Step Response

Start-Up Time

tSTR

—

200

—

µs

G = +1, 1% VOUT settling (Note 1)

Offset Correction Settling Time

tSTL

—

µs

G = +1, VIN step of 2V,

VOS within ±100 µV of its final value

Output Overdrive Recovery Time

tODR

—

µs

G = -10, ±0.5V input overdrive to VDD/2,

VIN 50% point to VOUT 90% point (Note 2)

EMI Protection

EMI Rejection Ratio

EMIRR

—

VIN = 0.1 VPK, f = 400 MHz, VDD = 45V

—

VIN = 0.1 VPK, f = 900 MHz, VDD = 45V

—

108

—

VIN = 0.1 VPK, f = 1800 MHz, VDD = 45V

—

109

—

VIN = 0.1 VPK, f = 2400 MHz, VDD = 45V

—

109

—

VIN = 0.1 VPK, f = 5600 MHz, VDD = 45V

Note 1: Behavior may vary with different gains; see Section 4.3.3 “Offset at Power-up”.

2: tSTL and tODR include some uncertainty due to clock edge timing.

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +4.5V to +45V, VSS = GND.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Temperature Ranges

Specified Temperature Range

-40

—

+125

°C

Operating Temperature Range

-40

—

+125

°C

Note 1

Storage Temperature Range

-65

—

+150

°C

Thermal Package Resistances

Thermal Resistance, 8-Lead MSOP

JA

—

206

—

°C/W

Thermal Resistance, 5-Lead SOT-23

JA

—

115

—

°C/W

Thermal Resistance, 8-Lead SOIC

JA

—

150

—

°C/W

Thermal Resistance, 14-Lead SOIC

JA

—

°C/W

Note 1: Operation must not cause TJ to exceed Maximum Junction Temperature specification (+150°C).

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