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PIC10F200 датащи(PDF) 68 Page - Microchip Technology |
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PIC10F200 датащи(HTML) 68 Page - Microchip Technology |
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68 / 86 page ![]() PIC10F200/202/204/206 DS41239B-page 66 Preliminary © 2005 Microchip Technology Inc. 12.2 DC Characteristics: PIC10F200/202/204/206 (Extended) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 °C ≤ TA ≤ +125°C (extended) Param No. Sym Characteristic Min Typ(1) Max Units Conditions D001 VDD Supply Voltage 2.0 5.5 V See Figure 12-1 D002 VDR RAM Data Retention Voltage(2) — 1.5* — V Device in Sleep mode D003 VPOR VDD Start Voltage to ensure Power-on Reset —Vss — V See Section 9.4 “DC Character- istics” for details D004 SVDD VDD Rise Rate to ensure Power-on Reset 0.05* — — V/ms See Section 9.4 “DC Character- istics” for details D010 IDD Supply Current(3) — — 170 350 TBD TBD μA μA FOSC = 4 MHz, VDD = 2.0V FOSC = 4 MHz, VDD = 5.0V D020 IPD Power-down Current(4) —0.1 TBD μAVDD = 2.0V D022 ΔIWDT WDT Current(4) —1.0 TBD μAVDD = 2.0V D023 ΔICMP Comparator Current(4) —15 TBD μAVDD = 2.0V D024 ΔIVREF Internal Reference Current(4) —TBD TBD μAVDD = 2.0V Legend: TBD = To Be Determined. * These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25 °C. This data is for design guidance only and is not tested. 2: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data. 3: The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus loading, bus rate, internal code execution pattern and temperature also have an impact on the current consumption. a) The test conditions for all IDD measurements in active operation mode are: All I/O pins tri-stated, pulled to VSS, T0CKI = VDD, MCLR = VDD; WDT enabled/disabled as specified. b) For standby current measurements, the conditions are the same, except that the device is in Sleep mode. 4: Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD or VSS. |
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