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ADM3050EBRIZ датащи(PDF) 17 Page - Analog Devices |
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ADM3050EBRIZ датащи(HTML) 17 Page - Analog Devices |
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17 / 19 page ![]() Data Sheet ADM3050E Rev. B | Page 17 of 19 APPLICATIONS INFORMATION RADIATED EMISSIONS AND PCB LAYOUT The ADM3050E isolated CAN transceivers with integrated dc-to-dc converters pass EN 55022, Class B by 6 dB on a simple 2-layer PCB design. Neither stitching capacitance nor high voltage surface mount (SMT) safety capacitors are required to meet this emission level. PCB LAYOUT The ADM3050E isolated CAN transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is required at the logic input supply (VDD1), and the shared CAN transceiver and digital isolator supply pin (VDD2). The recommended bypass capacitor value is 0.1 μF. Note that low effective series resistance (ESR) bypass capacitors are required and must be placed as close to the chip pads as possible. The total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. Bypassing between Pin 1, Pin 7, and Pin 8 and between Pin 16, Pin 10, and Pin 9 must also be considered, unless the ground pair on each package side is connected in close proximity to the package. In applications involving high common-mode transients, minimize board coupling across the isolation barrier. Design the board layout so that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this equal coupling can cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. ADM3050E 16 9 10 11 12 13 14 15 1 8 7 6 5 4 3 2 VDD1 GND1 GND1 TXD NC NC RXD GND1 VDD2 GND2 GND2 NC CANL CANH NC GND2 0.1µF 0.1µF Figure 25. Recommended 16-Lead SOIC_W PCB Layout 0.1µF 0.1µF 1 TXD 2 RXD 3 GND1 4 VDD1 VDD2 8 CANH 7 CANL 6 GND2 5 ADM3050E Figure 26. Recommended 8-Lead SOIC_IC PCB Layout THERMAL ANALYSIS The ADM3050E device consists of three internal die attached to a split lead frame. For the purposes of thermal analysis, the die are treated as a thermal unit, with the highest junction temperature reflected in the θJA value from Table 10. The θJA value is based on measurements taken with the devices mounted on a JEDEC standard, 4-layer board with fine width traces and still air. INSULATION LIFETIME All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period of time. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. The two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. Surface breakdown is the phenomenon of surface tracking and is the primary determinant of surface creepage requirements in system level standards. Insulation wear out is the phenomenon where charge injection or displacement currents inside the insulation material cause long-term insulation degradation. SURFACE TRACKING Surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage, the environmental conditions, and the properties of the insulation material. Safety agencies perform characterization testing on the surface insulation of components, allowing the components to be categorized in different material groups. Lower material group ratings are more resistant to surface tracking and can therefore provide adequate lifetime with smaller creepage. The minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, pollution degree, and material group. The material group and creepage for the ADM3050E isolator is listed in Table 3 for both the 8-lead, increased creepage SOIC package option and the 16-lead, wide body SOIC package option. INSULATION WEAR OUT The lifetime of insulation caused by wear out is determined by its thickness, material properties, and the voltage stress applied. It is important to verify that the product lifetime is adequate at the application working voltage. The working voltage supported by an isolator for wear out may not be the same as the working voltage supported for tracking. The working voltage applicable to tracking is specified in most standards. Testing and modeling have shown that the primary driver of long-term degradation is displacement current in the polyimide insulation causing incremental damage. The stress on the insulation can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out. |
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