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PCA9506DGG датащи(PDF) 22 Page - NXP Semiconductors

номер детали PCA9506DGG
подробное описание детали  40-bit I2C-bus I/O port with RESET, OE, and INT
PDF  30 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCA9506DGG датащи(HTML) 22 Page - NXP Semiconductors

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9397 750 14939
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 14 February 2006
22 of 30
Philips Semiconductors
PCA9506
40-bit I2C-bus I/O port with RESET, OE, and INT
[5]
The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage tf is specified at
250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without
exceeding the maximum specified tf.
[6]
Cb = total capacitance of one bus line in pF.
[7]
Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
Fig 16. Definition of timing on the I2C-bus
tSP
tBUF
tHD;STA
P
P
S
tLOW
tr
tHD;DAT
tf
tHIGH
tSU;DAT
tSU;STA
Sr
tHD;STA
tSU;STO
SDA
SCL
002aaa986
Rise and fall times refer to VIL and VIH.
Fig 17. I2C-bus timing diagram
SCL
SDA
tHD;STA
tSU;DAT
tHD;DAT
tf
tBUF
tSU;STA
tLOW
tHIGH
tVD;ACK
002aab175
tSU;STO
protocol
START
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
bit 0
(R/W)
acknowledge
(A)
STOP
condition
(P)
1/fSCL
tr
tVD;DAT



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