TMUX7348F datasheet(4/59 Pages) TI

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Table 6-1. Pin Functions: TMUX7348F (continued)

TYPE(1)

DESCRIPTION

NAME

TSSOP(2)

WQFN

VDD

Positive power supply. This pin is the most positive power-supply potential. For reliable operation,

connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.

VFN

Negative fault voltage supply that determines the overvoltage protection triggering threshold on the

negative side. Connect to VSS if the triggering threshold is to be the same as the device's negative

supply. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between

VFN and GND.

VFP

Positive fault voltage supply that determines the overvoltage protection triggering threshold on the

positive side. Connect to VDD if the triggering threshold is to be the same as the device's positive

supply. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between

VFP and GND.

VSS

Negative power supply. This pin is the most negative power-supply potential. In single-supply

applications, this pin can be connected to ground. For reliable operation, connect a decoupling

capacitor ranging from 0.1 µF to 10 µF between VSS and GND.

Thermal Pad

—

Thermal pad. The thermal pad is not connected internally. It is recommended that the pad be tied to

GND or VSS for best performance.

(1)

I = input, O = output, I/O = input and output, P = power

(2)

Preview package

GND

VSS

VDD

S1A

S1B

S2A

S2B

S3A

S3B

S4A

S4B

VFN

VFP

Not to scale

Figure 6-3. (Preview) PW Package, 20-Pin TSSOP

(Top View)

VSS

S1B

S1A

S2B

S2A

S3B

S3A

S4B

S4A

Not to scale

Thermal

Pad

Figure 6-4. (Preview) RTJ Package, 20-Pin WQFN

(Top View)

Table 6-2. Pin Functions: TMUX7349F

TYPE(1)

DESCRIPTION

NAME

TSSOP(2)

WQFN(2)

Logic control input address 0 (A0). The pin has a 4 MΩ internal pull-down resistor. This pin can also be

used together with the specific fault pin (SF) to indicate which input is under fault. See Section 9.4.3

for more details.

Logic control input address 1 (A1). The pin has a 4 MΩ internal pull-down resistor. This pin can also be

used together with the specific fault pin (SF) to indicate which input is under fault. See Section 9.4.3

for more details.

I/O

Drain terminal A. Can be an input or output. The drain pin is not overvoltage protected and shall

remain within the recommended operating range.

I/O

Drain terminal B. Can be an input or output. The drain pin is not overvoltage protected and shall

remain within the recommended operating range.

Active high logic enable (EN) pin. The pin has a 4 MΩ internal pull-down resistor. The device is

disabled and all switches become high impedance when the pin is low. When the pin is high, the Ax

logic inputs determine individual switch states. This pin can also be used together with the specific

fault pin (SF) to indicate which input is under fault. See Section 9.4.3 for more details.

General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is

detected on any of the source (Sx) input pins. Connect this pin to an external supply (1.8 V to 5.5 V)

through a 1 kΩ pull-up resistor.

GND

Ground (0 V) reference

TMUX7348F

SCDS400 – MARCH 2022

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