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AD9986 датащи(PDF) 10 Page - Analog Devices |
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AD9986 датащи(HTML) 10 Page - Analog Devices |
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10 / 37 page ![]() Data Sheet AD9986 SPECIFICATIONS analog.com Rev. 0 | 10 of 37 Table 12. JESD204 Transmitter Electrical Specifications Parameter Test Conditions/Comments Min Typ Max Unit Standards Compliance JESD204B and JESD204C Differential Output Voltage Maximum strength 675 mV p-p Differential Termination Impedance 80 108 120 Ω Rise Time, tR 20% to 80% into 100 Ω load 18 ps Fall Time, tF 20% to 80% into 100 Ω load 18 ps SYNCxINB± INPUT1 Where x = 0 or 1 Logic Compliance LVDS Differential Input Voltage 240 0.7 1900 mV p-p Input Common-Mode Voltage DC-coupled 0.675 2 V RIN (Differential) 18 kΩ Input Capacitance (Differential) 1 pF SYNCxINB+ INPUT CMOS input option Refer to the CMOS Pin Specifications section 1 IEEE 1596.3 standard LVDS compatible. Table 13. SYSREF Electrical Specifications Parameter Test Conditions/Comments Min Typ Max Unit SYSREF+ AND SYSREF− INPUTS Logic Compliance LVDS/LVPECL1 Differential Input Voltage 0.7 1.9 V p-p Input Common-Mode Voltage Range DC-coupled 0.675 2 V Input Reference, RIN (Differential) 100 Ω Input Capacitance (Differential) 1 pF 1 LVDS means low voltage differential signaling and LVPECL means low voltage positive/pseudo emitter-coupled logic. |
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